Power MISFETs fabricated with superlatticed gate "insulators" and transition buffer layers

Wen Chau Liu, Wen Shiung Lour

Research output: Contribution to journalArticle

9 Citations (Scopus)


A new GaAs MISFET with superlatticed gate "insulator" and transition buffer layer structure is proposed in this paper. The use of an undoped GaAsAl0.3Ga0.7As superlatticed gate "insulator" provides a high gate breakdown voltage ( > 36 V) with very low prebreakdown leakage current and a low gate capacitance (Cgs), compared to usual MESFET devices. Due to the existence of the gate "insulator", a high carrier concentration can be employed in the active channel, which improves the outer-drain-current capability and transconductance (over 200 mS/mm can be expected if the gate length is reduced to 1 μm). Also three different transition-buffer layers i.e. superlattice, graded superlattice and modulation-doped (MD) structures have been inserted between the active-channel and buffer layer respectively, to offer an excellent carrier confinement (to obtain a small interface degraded region) or to enhance the electrical performance of the active channel. Finally, the IV characteristics, output conductance and transconductance gm of the superlatticed gate FETs with different transition-buffer layers are investigated and compared. From the experimental results, it is clear that the proposed structures are suitable for power application.

Original languageEnglish
Pages (from-to)1019-1024
Number of pages6
JournalSolid State Electronics
Issue number8
Publication statusPublished - 1990 Aug

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics
  • Electrical and Electronic Engineering
  • Materials Chemistry

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