Processor and DRAM integration by TSV-based 3-D stacking for power-aware SOCs

Shin Shiun Chen; Chun Kai Hsu; Hsiu Chuan Shih; Jen Chieh Yeh; Cheng Wen Wu

doi:10.1109/ASPDAC.2013.6509634

Processor and DRAM integration by TSV-based 3-D stacking for power-aware SOCs

Shin Shiun Chen, Chun Kai Hsu, Hsiu Chuan Shih, Jen Chieh Yeh, Cheng Wen Wu

Department of Electrical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

2 Citations (Scopus)

Abstract

With the rapid popularization of mobile devices, the low-power and energy-efficient became far more important than the system operating frequency. This work demonstrates a processor and DRAM integration scheme by TSV-based 3-D stacking and the performance and energy efficiency is evaluated by an ESL design methodology. The integration scheme comprising Sans-Cache DRAM (SCDRAM) architecture which is designed under the power and energy considerations is explored. Experiment results show the proposed architecture can greatly reduce 80% energy while having 23.5% of system performance improvement.

Original language	English
Title of host publication	2013 18th Asia and South Pacific Design Automation Conference, ASP-DAC 2013
Pages	429-434
Number of pages	6
DOIs	https://doi.org/10.1109/ASPDAC.2013.6509634
Publication status	Published - 2013 May 20
Event	2013 18th Asia and South Pacific Design Automation Conference, ASP-DAC 2013 - Yokohama, Japan Duration: 2013 Jan 22 → 2013 Jan 25

Publication series

Name	Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Other

Other	2013 18th Asia and South Pacific Design Automation Conference, ASP-DAC 2013
Country	Japan
City	Yokohama
Period	13-01-22 → 13-01-25

All Science Journal Classification (ASJC) codes

Computer Science Applications
Computer Graphics and Computer-Aided Design
Electrical and Electronic Engineering

Access to Document

10.1109/ASPDAC.2013.6509634

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Cite this

Chen, S. S., Hsu, C. K., Shih, H. C., Yeh, J. C., & Wu, C. W. (2013). Processor and DRAM integration by TSV-based 3-D stacking for power-aware SOCs. In 2013 18th Asia and South Pacific Design Automation Conference, ASP-DAC 2013 (pp. 429-434). [6509634] (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC). https://doi.org/10.1109/ASPDAC.2013.6509634

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title = "Processor and DRAM integration by TSV-based 3-D stacking for power-aware SOCs",

abstract = "With the rapid popularization of mobile devices, the low-power and energy-efficient became far more important than the system operating frequency. This work demonstrates a processor and DRAM integration scheme by TSV-based 3-D stacking and the performance and energy efficiency is evaluated by an ESL design methodology. The integration scheme comprising Sans-Cache DRAM (SCDRAM) architecture which is designed under the power and energy considerations is explored. Experiment results show the proposed architecture can greatly reduce 80% energy while having 23.5% of system performance improvement.",

author = "Chen, {Shin Shiun} and Hsu, {Chun Kai} and Shih, {Hsiu Chuan} and Yeh, {Jen Chieh} and Wu, {Cheng Wen}",

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language = "English",

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note = "2013 18th Asia and South Pacific Design Automation Conference, ASP-DAC 2013 ; Conference date: 22-01-2013 Through 25-01-2013",

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Chen, SS, Hsu, CK, Shih, HC, Yeh, JC & Wu, CW 2013, Processor and DRAM integration by TSV-based 3-D stacking for power-aware SOCs. in 2013 18th Asia and South Pacific Design Automation Conference, ASP-DAC 2013., 6509634, Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC, pp. 429-434, 2013 18th Asia and South Pacific Design Automation Conference, ASP-DAC 2013, Yokohama, Japan, 13-01-22. https://doi.org/10.1109/ASPDAC.2013.6509634

Processor and DRAM integration by TSV-based 3-D stacking for power-aware SOCs. / Chen, Shin Shiun; Hsu, Chun Kai; Shih, Hsiu Chuan; Yeh, Jen Chieh; Wu, Cheng Wen.

2013 18th Asia and South Pacific Design Automation Conference, ASP-DAC 2013. 2013. p. 429-434 6509634 (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

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