PVD TiN metal gate MOSFETs on bulk silicon and fully depleted silicon-on-insulator (FDSOI) substrates for deep sub-quarter micron CMOS technology

B. Maiti; P. J. Tobin; C. Hobbs; R. I. Hegde; F. Huang; D. L. O'Meara; D. Jovanovic; M. Mendicino; J. Chen; D. Connelly; O. Adetutu; J. Mogab; J. Candelaria; L. B. La

PVD TiN metal gate MOSFETs on bulk silicon and fully depleted silicon-on-insulator (FDSOI) substrates for deep sub-quarter micron CMOS technology

B. Maiti, P. J. Tobin, C. Hobbs, R. I. Hegde, F. Huang, D. L. O'Meara, D. Jovanovic, M. Mendicino, J. Chen, D. Connelly, O. Adetutu, J. Mogab, J. Candelaria, L. B. La

Research output: Contribution to journal › Conference article › peer-review

40 Citations (Scopus)

Abstract

We report here for the first time an evaluation of a polysilicon capped physical vapor deposited (PVD) titanium nitride (TiN) metal gate integration on sub-quarter micron CMOSFETs using bulk Si and FDSOI substrates. In addition to eliminating poly depletion effects and lowering gate line resistance, the use of TiN gate enables lower Vt when used with FDSOI substrates instead of bulk Si. Excellent on-off and short channel characteristics can be obtained with TiN gate. Issues associated with Leff and reliability are also discussed.

Original language	English
Pages (from-to)	781-784
Number of pages	4
Journal	Technical Digest - International Electron Devices Meeting
Publication status	Published - 1998 Dec 1
Event	Proceedings of the 1998 IEEE International Electron Devices Meeting - San Francisco, CA, USA Duration: 1998 Dec 6 → 1998 Dec 9

All Science Journal Classification (ASJC) codes

Electronic, Optical and Magnetic Materials
Condensed Matter Physics
Electrical and Electronic Engineering
Materials Chemistry

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Maiti, B., Tobin, P. J., Hobbs, C., Hegde, R. I., Huang, F., O'Meara, D. L., Jovanovic, D., Mendicino, M., Chen, J., Connelly, D., Adetutu, O., Mogab, J., Candelaria, J., & La, L. B. (1998). PVD TiN metal gate MOSFETs on bulk silicon and fully depleted silicon-on-insulator (FDSOI) substrates for deep sub-quarter micron CMOS technology. Technical Digest - International Electron Devices Meeting, 781-784.

Maiti, B. ; Tobin, P. J. ; Hobbs, C. ; Hegde, R. I. ; Huang, F. ; O'Meara, D. L. ; Jovanovic, D. ; Mendicino, M. ; Chen, J. ; Connelly, D. ; Adetutu, O. ; Mogab, J. ; Candelaria, J. ; La, L. B. / PVD TiN metal gate MOSFETs on bulk silicon and fully depleted silicon-on-insulator (FDSOI) substrates for deep sub-quarter micron CMOS technology. In: Technical Digest - International Electron Devices Meeting. 1998 ; pp. 781-784.

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title = "PVD TiN metal gate MOSFETs on bulk silicon and fully depleted silicon-on-insulator (FDSOI) substrates for deep sub-quarter micron CMOS technology",

abstract = "We report here for the first time an evaluation of a polysilicon capped physical vapor deposited (PVD) titanium nitride (TiN) metal gate integration on sub-quarter micron CMOSFETs using bulk Si and FDSOI substrates. In addition to eliminating poly depletion effects and lowering gate line resistance, the use of TiN gate enables lower Vt when used with FDSOI substrates instead of bulk Si. Excellent on-off and short channel characteristics can be obtained with TiN gate. Issues associated with Leff and reliability are also discussed.",

author = "B. Maiti and Tobin, {P. J.} and C. Hobbs and Hegde, {R. I.} and F. Huang and O'Meara, {D. L.} and D. Jovanovic and M. Mendicino and J. Chen and D. Connelly and O. Adetutu and J. Mogab and J. Candelaria and La, {L. B.}",

year = "1998",

month = dec,

day = "1",

language = "English",

pages = "781--784",

journal = "Technical Digest - International Electron Devices Meeting",

issn = "0163-1918",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

note = "Proceedings of the 1998 IEEE International Electron Devices Meeting ; Conference date: 06-12-1998 Through 09-12-1998",

}

Maiti, B, Tobin, PJ, Hobbs, C, Hegde, RI, Huang, F, O'Meara, DL, Jovanovic, D, Mendicino, M, Chen, J, Connelly, D, Adetutu, O, Mogab, J, Candelaria, J & La, LB 1998, 'PVD TiN metal gate MOSFETs on bulk silicon and fully depleted silicon-on-insulator (FDSOI) substrates for deep sub-quarter micron CMOS technology', Technical Digest - International Electron Devices Meeting, pp. 781-784.

PVD TiN metal gate MOSFETs on bulk silicon and fully depleted silicon-on-insulator (FDSOI) substrates for deep sub-quarter micron CMOS technology. / Maiti, B.; Tobin, P. J.; Hobbs, C.; Hegde, R. I.; Huang, F.; O'Meara, D. L.; Jovanovic, D.; Mendicino, M.; Chen, J.; Connelly, D.; Adetutu, O.; Mogab, J.; Candelaria, J.; La, L. B.

In: Technical Digest - International Electron Devices Meeting, 01.12.1998, p. 781-784.

Research output: Contribution to journal › Conference article › peer-review

TY - JOUR

T1 - PVD TiN metal gate MOSFETs on bulk silicon and fully depleted silicon-on-insulator (FDSOI) substrates for deep sub-quarter micron CMOS technology

AU - Maiti, B.

AU - Tobin, P. J.

AU - Hobbs, C.

AU - Hegde, R. I.

AU - Huang, F.

AU - O'Meara, D. L.

AU - Jovanovic, D.

AU - Mendicino, M.

AU - Chen, J.

AU - Connelly, D.

AU - Adetutu, O.

AU - Mogab, J.

AU - Candelaria, J.

AU - La, L. B.

PY - 1998/12/1

Y1 - 1998/12/1

N2 - We report here for the first time an evaluation of a polysilicon capped physical vapor deposited (PVD) titanium nitride (TiN) metal gate integration on sub-quarter micron CMOSFETs using bulk Si and FDSOI substrates. In addition to eliminating poly depletion effects and lowering gate line resistance, the use of TiN gate enables lower Vt when used with FDSOI substrates instead of bulk Si. Excellent on-off and short channel characteristics can be obtained with TiN gate. Issues associated with Leff and reliability are also discussed.

AB - We report here for the first time an evaluation of a polysilicon capped physical vapor deposited (PVD) titanium nitride (TiN) metal gate integration on sub-quarter micron CMOSFETs using bulk Si and FDSOI substrates. In addition to eliminating poly depletion effects and lowering gate line resistance, the use of TiN gate enables lower Vt when used with FDSOI substrates instead of bulk Si. Excellent on-off and short channel characteristics can be obtained with TiN gate. Issues associated with Leff and reliability are also discussed.

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M3 - Conference article

AN - SCOPUS:17444440109

SP - 781

EP - 784

JO - Technical Digest - International Electron Devices Meeting

JF - Technical Digest - International Electron Devices Meeting

SN - 0163-1918

T2 - Proceedings of the 1998 IEEE International Electron Devices Meeting

Y2 - 6 December 1998 through 9 December 1998

ER -

PVD TiN metal gate MOSFETs on bulk silicon and fully depleted silicon-on-insulator (FDSOI) substrates for deep sub-quarter micron CMOS technology

Abstract

All Science Journal Classification (ASJC) codes

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