RAMSES-FT: A fault simulator for flash memory testing and diagnostics

Kuo Liang Cheng; Jen Chieh Yeh; Chih Wea Wang; Chih Tsun Huang; Cheng Wen Wu

doi:10.1109/VTS.2002.1011153

RAMSES-FT: A fault simulator for flash memory testing and diagnostics

Kuo Liang Cheng, Jen Chieh Yeh, Chih Wea Wang, Chih Tsun Huang, Cheng Wen Wu

Department of Electrical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

29 Citations (Scopus)

Abstract

In this paper we present a fault simulator for flash memory testing and diagnostics, called RAMSES-FT. The fault simulator is designed for easy inclusion of new fault models by adding their fault descriptors without modifying the simulation engine. The flash memory fault models are discussed, based on the failures defined in the IEEE 1005 Standard. Both the NOR-type and NAND-type flash memory architectures are covered. Our flash memory fault simulator uses a parallel simulation strategy to reduce the simulation time complexity from O(N³) to O(N²), where N is the number of cells. With the proposed scaling method for March tests, the simulation time complexity is further reduced to O(W²), where W is the word width of the memory. The fault simulator supports March algorithms as well as single memory operations, covering most of the flash memory tests. With RAMSES-FT we have developed a diagnostic algorithm that can distinguish the target flash memory faults.

Original language	English
Title of host publication	Proceedings - 20th IEEE VLSI Test Symposium, VTS 2002
Publisher	IEEE Computer Society
Pages	281-286
Number of pages	6
ISBN (Electronic)	0769515703
DOIs	https://doi.org/10.1109/VTS.2002.1011153
Publication status	Published - 2002 Jan 1
Event	20th IEEE VLSI Test Symposium, VTS 2002 - Monterey, United States Duration: 2002 Apr 28 → 2002 May 2

Publication series

Name	Proceedings of the IEEE VLSI Test Symposium
Volume	2002-January

Conference

Conference	20th IEEE VLSI Test Symposium, VTS 2002
Country	United States
City	Monterey
Period	02-04-28 → 02-05-02

All Science Journal Classification (ASJC) codes

Computer Science Applications
Electrical and Electronic Engineering

Access to Document

10.1109/VTS.2002.1011153

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Cite this

Cheng, K. L., Yeh, J. C., Wang, C. W., Huang, C. T., & Wu, C. W. (2002). RAMSES-FT: A fault simulator for flash memory testing and diagnostics. In Proceedings - 20th IEEE VLSI Test Symposium, VTS 2002 (pp. 281-286). [1011153] (Proceedings of the IEEE VLSI Test Symposium; Vol. 2002-January). IEEE Computer Society. https://doi.org/10.1109/VTS.2002.1011153

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abstract = "In this paper we present a fault simulator for flash memory testing and diagnostics, called RAMSES-FT. The fault simulator is designed for easy inclusion of new fault models by adding their fault descriptors without modifying the simulation engine. The flash memory fault models are discussed, based on the failures defined in the IEEE 1005 Standard. Both the NOR-type and NAND-type flash memory architectures are covered. Our flash memory fault simulator uses a parallel simulation strategy to reduce the simulation time complexity from O(N3) to O(N2), where N is the number of cells. With the proposed scaling method for March tests, the simulation time complexity is further reduced to O(W2), where W is the word width of the memory. The fault simulator supports March algorithms as well as single memory operations, covering most of the flash memory tests. With RAMSES-FT we have developed a diagnostic algorithm that can distinguish the target flash memory faults.",

author = "Cheng, {Kuo Liang} and Yeh, {Jen Chieh} and Wang, {Chih Wea} and Huang, {Chih Tsun} and Wu, {Cheng Wen}",

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Cheng, KL, Yeh, JC, Wang, CW, Huang, CT & Wu, CW 2002, RAMSES-FT: A fault simulator for flash memory testing and diagnostics. in Proceedings - 20th IEEE VLSI Test Symposium, VTS 2002., 1011153, Proceedings of the IEEE VLSI Test Symposium, vol. 2002-January, IEEE Computer Society, pp. 281-286, 20th IEEE VLSI Test Symposium, VTS 2002, Monterey, United States, 02-04-28. https://doi.org/10.1109/VTS.2002.1011153

RAMSES-FT : A fault simulator for flash memory testing and diagnostics. / Cheng, Kuo Liang; Yeh, Jen Chieh; Wang, Chih Wea; Huang, Chih Tsun; Wu, Cheng Wen.

Proceedings - 20th IEEE VLSI Test Symposium, VTS 2002. IEEE Computer Society, 2002. p. 281-286 1011153 (Proceedings of the IEEE VLSI Test Symposium; Vol. 2002-January).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

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