The dry etching technique has been developed to etch via holes through a 5-mil-thick GaAs wafer by rf power and reactive gas pressures in a reactive ion etching system. The etching parameters are optimized for a slope profile suitable for power field effect transistors and monolithic microwave integrated circuit applications. The selectivity between GaAs and photoresist and the average etching rate can be higher than 30 and 1.1 μm/min, respectively. Furthermore, the slope angle measured from the vertical is larger than 11°, which is well suited for a thick GaAs via-hole etching process. Before the metal for the via-hole substrate is sputtered, the wet chemical etching solution based on HCl-H2O2/H2O at room temperature is used to smooth the sidewall for a better connection. To probe these source pads, the via-hole resistances of the pseudomorphic high electron mobility transistors (PHEMTs) are measured to be less than 0.5 Ω with more than 97.2% yield in a 4 in. diameter GaAs wafer. It is found that the rf performance for low-noise and power PHEMTs can be further improved.
|Number of pages||6|
|Journal||Journal of Vacuum Science and Technology B: Microelectronics and Nanometer Structures|
|Publication status||Published - 2007 Apr 8|
All Science Journal Classification (ASJC) codes
- Condensed Matter Physics
- Electrical and Electronic Engineering