Reconfigurable architecture design of motion compensation for multi-standard video coding

Gwo-Giun Lee, Wei Chiao Yang, Min Shan Wu, He Yuan Lin

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)

Abstract

This paper proposes a reconfigurable video decoder architecture of motion compensation for multi-standard video coding including MPEG-2, MPEG-4 and H.264. Through top-down design methodology, we analyze the motion compensation algorithm of the targeted applications and extract the commonality of motion compensation algorithms among the three different standards. To design a reconfigurable processing element to perform the integer-sample and fractional-sample interpolation operations to simultaneously support the main video standards, a regular data flow is arranged during the design space exploration. In addition, the bandwidth reduction strategies are also adopted to reduce the memory access times and power consumption of motion compensation operations for high bandwidth requirement, especially in H.264. The design implementation of the proposed architecture is synthesized using TMSC 0.18um technology library and can operate at 108HMz to achieve the real time motion compensation coding of 1920x1088 at 30 frames per second in the three video standards.

Original languageEnglish
Title of host publicationISCAS 2010 - 2010 IEEE International Symposium on Circuits and Systems
Subtitle of host publicationNano-Bio Circuit Fabrics and Systems
Pages2003-2006
Number of pages4
DOIs
Publication statusPublished - 2010 Aug 31
Event2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems, ISCAS 2010 - Paris, France
Duration: 2010 May 302010 Jun 2

Publication series

NameISCAS 2010 - 2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems

Other

Other2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems, ISCAS 2010
CountryFrance
CityParis
Period10-05-3010-06-02

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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