TY - GEN
T1 - Reducing aging on scratchpad memory using temporal- and FSM-based power management
AU - Law, Yun Kae
AU - Lin, Ing Chao
AU - Lin, Cheng Chien
N1 - Publisher Copyright:
© 2017 IEEE.
PY - 2017/6/5
Y1 - 2017/6/5
N2 - Scratchpad memory (SPM) which is software-controlled SRAM has lower power consumption compared to cache. It is becoming widely used in CPU, GPU and embedded devices. Meanwhile, as CMOS technology continues shrinking, negative bias temperature instability (NBTI) has become a major reliability concern. Recent studies show that SRAM suffers from NBTI effect, so it is a significant issue for SPM. While most research has focused on mitigating aging on cache, little attention are focusing on SPM aging mitigation. In this paper, we propose a temporal-based power management technique to turn SPM pages into sleep modes according to its recently used history. To account for different access behaviors of different applications, we propose a dynamic threshold adjustment algorithm to adjust a predefined threshold (Pth) to turn off the idle pages dynamically. We also propose a FSM-based power management technique that combines both voltage scaling and power gating techniques to change the states of SPM pages into drowsy mode or sleep mode at runtime. The experimental results show that degradation is improved more than 7% when both techniques are used simultaneously.
AB - Scratchpad memory (SPM) which is software-controlled SRAM has lower power consumption compared to cache. It is becoming widely used in CPU, GPU and embedded devices. Meanwhile, as CMOS technology continues shrinking, negative bias temperature instability (NBTI) has become a major reliability concern. Recent studies show that SRAM suffers from NBTI effect, so it is a significant issue for SPM. While most research has focused on mitigating aging on cache, little attention are focusing on SPM aging mitigation. In this paper, we propose a temporal-based power management technique to turn SPM pages into sleep modes according to its recently used history. To account for different access behaviors of different applications, we propose a dynamic threshold adjustment algorithm to adjust a predefined threshold (Pth) to turn off the idle pages dynamically. We also propose a FSM-based power management technique that combines both voltage scaling and power gating techniques to change the states of SPM pages into drowsy mode or sleep mode at runtime. The experimental results show that degradation is improved more than 7% when both techniques are used simultaneously.
UR - http://www.scopus.com/inward/record.url?scp=85021450670&partnerID=8YFLogxK
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U2 - 10.1109/VLSI-DAT.2017.7939675
DO - 10.1109/VLSI-DAT.2017.7939675
M3 - Conference contribution
AN - SCOPUS:85021450670
T3 - 2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017
BT - 2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017
Y2 - 24 April 2017 through 27 April 2017
ER -