Reducing aging on scratchpad memory using temporal- and FSM-based power management

Yun Kae Law, Ing-Chao Lin, Cheng Chien Lin

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Scratchpad memory (SPM) which is software-controlled SRAM has lower power consumption compared to cache. It is becoming widely used in CPU, GPU and embedded devices. Meanwhile, as CMOS technology continues shrinking, negative bias temperature instability (NBTI) has become a major reliability concern. Recent studies show that SRAM suffers from NBTI effect, so it is a significant issue for SPM. While most research has focused on mitigating aging on cache, little attention are focusing on SPM aging mitigation. In this paper, we propose a temporal-based power management technique to turn SPM pages into sleep modes according to its recently used history. To account for different access behaviors of different applications, we propose a dynamic threshold adjustment algorithm to adjust a predefined threshold (Pth) to turn off the idle pages dynamically. We also propose a FSM-based power management technique that combines both voltage scaling and power gating techniques to change the states of SPM pages into drowsy mode or sleep mode at runtime. The experimental results show that degradation is improved more than 7% when both techniques are used simultaneously.

Original languageEnglish
Title of host publication2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781509039692
DOIs
Publication statusPublished - 2017 Jun 5
Event2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017 - Hsinchu, Taiwan
Duration: 2017 Apr 242017 Apr 27

Publication series

Name2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017

Other

Other2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017
CountryTaiwan
CityHsinchu
Period17-04-2417-04-27

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering
  • Safety, Risk, Reliability and Quality

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    Law, Y. K., Lin, I-C., & Lin, C. C. (2017). Reducing aging on scratchpad memory using temporal- and FSM-based power management. In 2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017 [7939675] (2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/VLSI-DAT.2017.7939675