TY - JOUR
T1 - Reliability mechanisms of LTPS-TFT with HfO2 gate dielectric
T2 - PBTI, NBTI, and hot-carrier stress
AU - Ma, Ming Wen
AU - Chen, Chi Yang
AU - Wu, Woei Cheng
AU - Su, Chun Jung
AU - Kao, Kuo Hsing
AU - Chao, Tien Sheng
AU - Lei, Tan Fu
N1 - Funding Information:
Manuscript received August 9, 2007; revised February 13, 2008. This work was supported by the National Science Council, Taiwan, R.O.C., under Contract NSC-95-2221-E-009-272. The review of this paper was arranged by Editor J. Suehle. M.-W. Ma, C.-Y. Chen, and C.-J. Su are with the Institute of Electronics, National Chiao Tung University, Hsinchu 300, Taiwan, R.O.C. W.-C. Wu, K.-H. Kao, and T.-S. Chao are with the Institute and Department of Electrophysics, National Chiao Tung University, Hsinchu 300, Taiwan, R.O.C. (e-mail: tschao@mail.nctu.edu.tw). T.-F. Lei is with the Department of Electronics Engineering and the Institute of Electronics, National Chiao Tung University, Hsinchu 300, Taiwan, R.O.C. Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TED.2008.919710
Funding Information:
The authors would like to thank the processes support from the National Nano Device Labs and the Nano Facility Center of the National Chiao Tung University.
PY - 2008/5
Y1 - 2008/5
N2 - In this paper, a comprehensive study of the reliability mechanisms of high-performance low-temperature polycrystalline-Si thin-film transistor (LTPS-TFT) with HfO2 gate dielectric is reported for the first time. Various bias- and temperature-stress conditions, which correspond to positive-bias stress (PBS), positive-bias temperature instability (PBTI), negative-bias stress (NBS), negative-bias temperature instability (NBTI), and hot-carrier stress, are used to differentiate the distribution and mechanism of trap density states. The generation of deep-trap states of the effective interfacial layer (IL), tail-trap states of poly-Si grain boundaries, and electron trapping of the HfO2 gate dielectric is observed for the PBS and PBTI of the HfO2 LTPS-TFT. In addition, both the deep- and tail-trap states of the effective IL are generated under NBS and NBTI of the HfO2 LTPS-TFT.
AB - In this paper, a comprehensive study of the reliability mechanisms of high-performance low-temperature polycrystalline-Si thin-film transistor (LTPS-TFT) with HfO2 gate dielectric is reported for the first time. Various bias- and temperature-stress conditions, which correspond to positive-bias stress (PBS), positive-bias temperature instability (PBTI), negative-bias stress (NBS), negative-bias temperature instability (NBTI), and hot-carrier stress, are used to differentiate the distribution and mechanism of trap density states. The generation of deep-trap states of the effective interfacial layer (IL), tail-trap states of poly-Si grain boundaries, and electron trapping of the HfO2 gate dielectric is observed for the PBS and PBTI of the HfO2 LTPS-TFT. In addition, both the deep- and tail-trap states of the effective IL are generated under NBS and NBTI of the HfO2 LTPS-TFT.
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U2 - 10.1109/TED.2008.919710
DO - 10.1109/TED.2008.919710
M3 - Article
AN - SCOPUS:43749100691
VL - 55
SP - 1153
EP - 1160
JO - IEEE Transactions on Electron Devices
JF - IEEE Transactions on Electron Devices
SN - 0018-9383
IS - 5
ER -