Abstract
This work proposes an emission (EM) gate driver that is based on p-type low-temperature polycrystalline silicon thin-film transistors (LTPS TFTs) with the implementation of lightly doped drain (LDD) to achieve flat off current. The long-tail phenomenon associated with the EM signal that is caused by a high threshold voltage (VTH) and VTH variation in LTPS TFTs is improved by enhancing the driving capability of the pull-down TFT. The pulse width of the EM signal is adjustable, and the gate driver has a stabilizing structure to reduce the voltage deviation caused by the high leakage current (ILeak) of LTPS TFTs; it keeps the EM signal at its lowest voltage level for 96.7% of the duration of a frame. Measurements indicate that the proposed structure shortens the falling time of the EM signal to 3.815 μ s, which is much shorter than a horizontal time of 46 μ s, yielding an EM signal with low distortion.
Original language | English |
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Pages (from-to) | 400-403 |
Number of pages | 4 |
Journal | IEEE Electron Device Letters |
Volume | 45 |
Issue number | 3 |
DOIs | |
Publication status | Published - 2024 Mar 1 |
All Science Journal Classification (ASJC) codes
- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering