Routing-aware placement algorithms for modern analog integrated circuits

Cheng Wu Lin, Cheng Chung Lu, Chun Po Huang, Soon-Jyh Chang, Jai-Ming Lin

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

Abstract

Due to continuous scaling in modern process technologies, more and more analog and mixed-signal circuits are integrated with digital units to realize system-on-a-chip. Since analog designs generally need comprehensive analysis to ensure circuit performances, it usually requires more development time to implement analog blocks than digital ones. Because of the difficulties in analog designs and the lack of support by design automation tools, analog circuits become bottleneck in the chip design flow. Although some studies have been proposed to consider placement of analog circuits recently, they usually ignore routing problems. In this paper, some issues about placement and routing for analog circuits are discussed, which include prevention of noisy signals in symmetry islands, congestion elimination in practical placement, and routing area reduction in capacitor arrays. By considering placement and routing at the same time, the routing-induced problems which may cause unwanted effects to deteriorate analog layout quality can be prevented.

Original languageEnglish
Title of host publication54th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2011
DOIs
Publication statusPublished - 2011
Event54th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2011 - Seoul, Korea, Republic of
Duration: 2011 Aug 72011 Aug 10

Other

Other54th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2011
CountryKorea, Republic of
CitySeoul
Period11-08-0711-08-10

Fingerprint

Analog circuits
Capacitors
Automation
Analog integrated circuits
Networks (circuits)

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

Cite this

Lin, C. W., Lu, C. C., Huang, C. P., Chang, S-J., & Lin, J-M. (2011). Routing-aware placement algorithms for modern analog integrated circuits. In 54th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2011 [6026537] https://doi.org/10.1109/MWSCAS.2011.6026537
Lin, Cheng Wu ; Lu, Cheng Chung ; Huang, Chun Po ; Chang, Soon-Jyh ; Lin, Jai-Ming. / Routing-aware placement algorithms for modern analog integrated circuits. 54th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2011. 2011.
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Lin, CW, Lu, CC, Huang, CP, Chang, S-J & Lin, J-M 2011, Routing-aware placement algorithms for modern analog integrated circuits. in 54th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2011., 6026537, 54th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2011, Seoul, Korea, Republic of, 11-08-07. https://doi.org/10.1109/MWSCAS.2011.6026537

Routing-aware placement algorithms for modern analog integrated circuits. / Lin, Cheng Wu; Lu, Cheng Chung; Huang, Chun Po; Chang, Soon-Jyh; Lin, Jai-Ming.

54th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2011. 2011. 6026537.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

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Lin CW, Lu CC, Huang CP, Chang S-J, Lin J-M. Routing-aware placement algorithms for modern analog integrated circuits. In 54th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2011. 2011. 6026537 https://doi.org/10.1109/MWSCAS.2011.6026537