Scenarios of CMOS scaling

Kang L. Wang, William T. Lynch

Research output: Contribution to conferencePaperpeer-review

10 Citations (Scopus)

Abstract

This paper attempts to provide plausible scenarios of scaled CMOS. We will address the issues, challenges and opportunities for research and development in the quest of ultra dense CMOS. We will examine several possible paradigms of clever devices and their integration. The long-term effort, beyond the post shrink era of CMOS, to be discussed will include functional device clusters and alternative computational architectures for satisfying the information need in the next Century.

Original languageEnglish
Pages12-16
Number of pages5
Publication statusPublished - 1998
EventProceedings of the 1998 5th International Conference on Solid-State and Integrated Circuit Technology - Beijing, China
Duration: 1998 Oct 211998 Oct 23

Other

OtherProceedings of the 1998 5th International Conference on Solid-State and Integrated Circuit Technology
CityBeijing, China
Period98-10-2198-10-23

All Science Journal Classification (ASJC) codes

  • Engineering(all)

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