segmented analog-to-digital converter and method thereof

Soon-Jyh Chang (Inventor)

Research output: Patent

Abstract

The configurations and adjusting method of a subrange analog-to-digital converter (ADC) are provided. The provided subrange ADC includes a X.5-bit flash ADC, a Y-bit SAR ADC and a (X+Y)-bit segmented capacitive digital-to-analog converter (DAC).
Translated title of the contribution分段式類比數位轉換器及其方法
Original languageEnglish
Patent number8310388
Publication statusPublished - 2012 Jun 21

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