Silicon germanium FinFET device physics, process integration and modeling considerations (invited)

Darsen Lu, Pierre Morin, Bhagawan Sahu, Terence B. Hook, Pouya Hashemi, Andreas Scholze, Bomsoo Kim, Pranita Kerber, Ali Khakifirooz, Phil Oldiges, Ken Rim, Bruce Doris

Research output: Contribution to journalConference article

5 Citations (Scopus)

Abstract

We introduce SiGe FinFET device physics, process integration, and modeling considerations. Germanium is know to have a higher hole mobility than silicon. Enhancement of hole velocity due to lattice mismatch strain in SiGe epitaxy layers is significant. In addition, uniaxial stress is beneficial for device performance. Transformation of biaxial to uniaxial stress naturally occurs when SiGe film is etched into stripes. Furthermore, control of MOSFET threshold voltage by adjusting the SiGe-channel germanium content is possible. On the other hand, SiGe processing challenges include the elimination of interface trap states at the gate dielectric interface, fast diffusion of n-type dopants, and defects in stress relaxed buffer and critical thickness limitations. Band-to-band tunneling sets a lower bound to device static leakage current.

Original languageEnglish
Pages (from-to)337-345
Number of pages9
JournalECS Transactions
Volume64
Issue number6
DOIs
Publication statusPublished - 2014 Jan 1
Event6th SiGe, Ge, and Related Compounds: Materials, Processing and Devices Symposium - 2014 ECS and SMEQ Joint International Meeting - Cancun, Mexico
Duration: 2014 Oct 52014 Oct 9

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Germanium
Physics
Silicon
Lattice mismatch
Hole mobility
Gate dielectrics
Threshold voltage
Epitaxial growth
Leakage currents
Doping (additives)
Defects
Processing
FinFET

All Science Journal Classification (ASJC) codes

  • Engineering(all)

Cite this

Lu, Darsen ; Morin, Pierre ; Sahu, Bhagawan ; Hook, Terence B. ; Hashemi, Pouya ; Scholze, Andreas ; Kim, Bomsoo ; Kerber, Pranita ; Khakifirooz, Ali ; Oldiges, Phil ; Rim, Ken ; Doris, Bruce. / Silicon germanium FinFET device physics, process integration and modeling considerations (invited). In: ECS Transactions. 2014 ; Vol. 64, No. 6. pp. 337-345.
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Lu, D, Morin, P, Sahu, B, Hook, TB, Hashemi, P, Scholze, A, Kim, B, Kerber, P, Khakifirooz, A, Oldiges, P, Rim, K & Doris, B 2014, 'Silicon germanium FinFET device physics, process integration and modeling considerations (invited)', ECS Transactions, vol. 64, no. 6, pp. 337-345. https://doi.org/10.1149/06406.0337ecst

Silicon germanium FinFET device physics, process integration and modeling considerations (invited). / Lu, Darsen; Morin, Pierre; Sahu, Bhagawan; Hook, Terence B.; Hashemi, Pouya; Scholze, Andreas; Kim, Bomsoo; Kerber, Pranita; Khakifirooz, Ali; Oldiges, Phil; Rim, Ken; Doris, Bruce.

In: ECS Transactions, Vol. 64, No. 6, 01.01.2014, p. 337-345.

Research output: Contribution to journalConference article

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T1 - Silicon germanium FinFET device physics, process integration and modeling considerations (invited)

AU - Lu, Darsen

AU - Morin, Pierre

AU - Sahu, Bhagawan

AU - Hook, Terence B.

AU - Hashemi, Pouya

AU - Scholze, Andreas

AU - Kim, Bomsoo

AU - Kerber, Pranita

AU - Khakifirooz, Ali

AU - Oldiges, Phil

AU - Rim, Ken

AU - Doris, Bruce

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AB - We introduce SiGe FinFET device physics, process integration, and modeling considerations. Germanium is know to have a higher hole mobility than silicon. Enhancement of hole velocity due to lattice mismatch strain in SiGe epitaxy layers is significant. In addition, uniaxial stress is beneficial for device performance. Transformation of biaxial to uniaxial stress naturally occurs when SiGe film is etched into stripes. Furthermore, control of MOSFET threshold voltage by adjusting the SiGe-channel germanium content is possible. On the other hand, SiGe processing challenges include the elimination of interface trap states at the gate dielectric interface, fast diffusion of n-type dopants, and defects in stress relaxed buffer and critical thickness limitations. Band-to-band tunneling sets a lower bound to device static leakage current.

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