TY - GEN
T1 - Silicon-package-board co-design for the eye diagram prediction of a 3Gbps HDMI transmitter
AU - Huang, Chung Ming
AU - Guo, Wei Da
AU - Shen, Chia Re
AU - Tsai, Chih Chung
PY - 2013
Y1 - 2013
N2 - In the design of high-speed transmitter, eye diagram is widely recognized as the most critical specification. For the highspeed data rate higher than 2Gbps, the eye opening would be very sensitive to the system design, such as PCB, connector, package, and so on. To fast converge the inevitable design iteration, a silicon-package-board (SPB) co-design methodology is required for accurate prediction of the output eye diagram. A 3Gbps HDMI transmitter design for display of 4K2K resolution is proposed based on the SPB co-simulation with well-extracted system models. The measured eye diagram at 3Gbps passed the compliance test specification (CTS) and is well correlated to the post-layout simulation result.
AB - In the design of high-speed transmitter, eye diagram is widely recognized as the most critical specification. For the highspeed data rate higher than 2Gbps, the eye opening would be very sensitive to the system design, such as PCB, connector, package, and so on. To fast converge the inevitable design iteration, a silicon-package-board (SPB) co-design methodology is required for accurate prediction of the output eye diagram. A 3Gbps HDMI transmitter design for display of 4K2K resolution is proposed based on the SPB co-simulation with well-extracted system models. The measured eye diagram at 3Gbps passed the compliance test specification (CTS) and is well correlated to the post-layout simulation result.
UR - http://www.scopus.com/inward/record.url?scp=84881330464&partnerID=8YFLogxK
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U2 - 10.1109/VLDI-DAT.2013.6533856
DO - 10.1109/VLDI-DAT.2013.6533856
M3 - Conference contribution
AN - SCOPUS:84881330464
SN - 9781467344357
T3 - 2013 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT 2013
BT - 2013 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT 2013
T2 - 2013 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT 2013
Y2 - 22 April 2013 through 24 April 2013
ER -