Simulation-Based Test Algorithm Generation and Port Scheduling for Multi-Port Memories

Cheng-Wen Wu, C.-F. Wu, C.-T. Huang, K.-L. Cheng, C.-W. Wang

Research output: Chapter in Book/Report/Conference proceedingConference contribution

11 Citations (Scopus)
Original languageEnglish
Title of host publicationIEEE/ACM Design Automation Conf. (DAC)
Place of PublicationLas Vegas
Publication statusPublished - 2001 Jun

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