Abstract
Single mask dual damascene processes are described. The unique mask merges via and modified trench patterns. We design the mask's trench area to have partial transmission using thin chromium or add phase shifted gratings in the trench area to achieve destructive interference for lowering the intensity. Optical proximity correction is used to obtain the desired lithography process window. Upon exposure, the trench results in a partial exposure while the via is fully exposed and a dual damascene (DD) photoresist profile is created within specifications. Following with an integrated etch can complete the DD image transfer into the underneath dielectric. A single mask DD process eliminates via/trench misalignment issues, can save up to one half of metal mask cost, and 50% of other processing costs. It is expected to also boost yield and improve product reliability.
| Original language | English |
|---|---|
| Pages (from-to) | 599-602 |
| Number of pages | 4 |
| Journal | Microelectronic Engineering |
| Volume | 85 |
| Issue number | 3 |
| DOIs | |
| Publication status | Published - 2008 Mar 1 |
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All Science Journal Classification (ASJC) codes
- Electronic, Optical and Magnetic Materials
- Atomic and Molecular Physics, and Optics
- Condensed Matter Physics
- Surfaces, Coatings and Films
- Electrical and Electronic Engineering
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Single mask dual damascene processes. / Perng, Dung-Ching; Fang, Jia Feng; Chen, Jhin Wei.
In: Microelectronic Engineering, Vol. 85, No. 3, 01.03.2008, p. 599-602.Research output: Contribution to journal › Article
TY - JOUR
T1 - Single mask dual damascene processes
AU - Perng, Dung-Ching
AU - Fang, Jia Feng
AU - Chen, Jhin Wei
PY - 2008/3/1
Y1 - 2008/3/1
N2 - Single mask dual damascene processes are described. The unique mask merges via and modified trench patterns. We design the mask's trench area to have partial transmission using thin chromium or add phase shifted gratings in the trench area to achieve destructive interference for lowering the intensity. Optical proximity correction is used to obtain the desired lithography process window. Upon exposure, the trench results in a partial exposure while the via is fully exposed and a dual damascene (DD) photoresist profile is created within specifications. Following with an integrated etch can complete the DD image transfer into the underneath dielectric. A single mask DD process eliminates via/trench misalignment issues, can save up to one half of metal mask cost, and 50% of other processing costs. It is expected to also boost yield and improve product reliability.
AB - Single mask dual damascene processes are described. The unique mask merges via and modified trench patterns. We design the mask's trench area to have partial transmission using thin chromium or add phase shifted gratings in the trench area to achieve destructive interference for lowering the intensity. Optical proximity correction is used to obtain the desired lithography process window. Upon exposure, the trench results in a partial exposure while the via is fully exposed and a dual damascene (DD) photoresist profile is created within specifications. Following with an integrated etch can complete the DD image transfer into the underneath dielectric. A single mask DD process eliminates via/trench misalignment issues, can save up to one half of metal mask cost, and 50% of other processing costs. It is expected to also boost yield and improve product reliability.
UR - http://www.scopus.com/inward/record.url?scp=39149145548&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=39149145548&partnerID=8YFLogxK
U2 - 10.1016/j.mee.2007.11.003
DO - 10.1016/j.mee.2007.11.003
M3 - Article
VL - 85
SP - 599
EP - 602
JO - Microelectronic Engineering
JF - Microelectronic Engineering
SN - 0167-9317
IS - 3
ER -