Single mask dual damascene processes

Dung-Ching Perng, Jia Feng Fang, Jhin Wei Chen

Research output: Contribution to journalArticle

1 Citation (Scopus)

Abstract

Single mask dual damascene processes are described. The unique mask merges via and modified trench patterns. We design the mask's trench area to have partial transmission using thin chromium or add phase shifted gratings in the trench area to achieve destructive interference for lowering the intensity. Optical proximity correction is used to obtain the desired lithography process window. Upon exposure, the trench results in a partial exposure while the via is fully exposed and a dual damascene (DD) photoresist profile is created within specifications. Following with an integrated etch can complete the DD image transfer into the underneath dielectric. A single mask DD process eliminates via/trench misalignment issues, can save up to one half of metal mask cost, and 50% of other processing costs. It is expected to also boost yield and improve product reliability.

Original languageEnglish
Pages (from-to)599-602
Number of pages4
JournalMicroelectronic Engineering
Volume85
Issue number3
DOIs
Publication statusPublished - 2008 Mar 1

Fingerprint

Masks
masks
costs
Chromium
Photoresists
acceleration (physics)
photoresists
misalignment
Lithography
proximity
Costs
specifications
chromium
lithography
Metals
gratings
Specifications
interference
products
Processing

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Atomic and Molecular Physics, and Optics
  • Condensed Matter Physics
  • Surfaces, Coatings and Films
  • Electrical and Electronic Engineering

Cite this

Perng, Dung-Ching ; Fang, Jia Feng ; Chen, Jhin Wei. / Single mask dual damascene processes. In: Microelectronic Engineering. 2008 ; Vol. 85, No. 3. pp. 599-602.
@article{4886fbfaf0a94421bd57a0907bd25c1b,
title = "Single mask dual damascene processes",
abstract = "Single mask dual damascene processes are described. The unique mask merges via and modified trench patterns. We design the mask's trench area to have partial transmission using thin chromium or add phase shifted gratings in the trench area to achieve destructive interference for lowering the intensity. Optical proximity correction is used to obtain the desired lithography process window. Upon exposure, the trench results in a partial exposure while the via is fully exposed and a dual damascene (DD) photoresist profile is created within specifications. Following with an integrated etch can complete the DD image transfer into the underneath dielectric. A single mask DD process eliminates via/trench misalignment issues, can save up to one half of metal mask cost, and 50{\%} of other processing costs. It is expected to also boost yield and improve product reliability.",
author = "Dung-Ching Perng and Fang, {Jia Feng} and Chen, {Jhin Wei}",
year = "2008",
month = "3",
day = "1",
doi = "10.1016/j.mee.2007.11.003",
language = "English",
volume = "85",
pages = "599--602",
journal = "Microelectronic Engineering",
issn = "0167-9317",
publisher = "Elsevier",
number = "3",

}

Single mask dual damascene processes. / Perng, Dung-Ching; Fang, Jia Feng; Chen, Jhin Wei.

In: Microelectronic Engineering, Vol. 85, No. 3, 01.03.2008, p. 599-602.

Research output: Contribution to journalArticle

TY - JOUR

T1 - Single mask dual damascene processes

AU - Perng, Dung-Ching

AU - Fang, Jia Feng

AU - Chen, Jhin Wei

PY - 2008/3/1

Y1 - 2008/3/1

N2 - Single mask dual damascene processes are described. The unique mask merges via and modified trench patterns. We design the mask's trench area to have partial transmission using thin chromium or add phase shifted gratings in the trench area to achieve destructive interference for lowering the intensity. Optical proximity correction is used to obtain the desired lithography process window. Upon exposure, the trench results in a partial exposure while the via is fully exposed and a dual damascene (DD) photoresist profile is created within specifications. Following with an integrated etch can complete the DD image transfer into the underneath dielectric. A single mask DD process eliminates via/trench misalignment issues, can save up to one half of metal mask cost, and 50% of other processing costs. It is expected to also boost yield and improve product reliability.

AB - Single mask dual damascene processes are described. The unique mask merges via and modified trench patterns. We design the mask's trench area to have partial transmission using thin chromium or add phase shifted gratings in the trench area to achieve destructive interference for lowering the intensity. Optical proximity correction is used to obtain the desired lithography process window. Upon exposure, the trench results in a partial exposure while the via is fully exposed and a dual damascene (DD) photoresist profile is created within specifications. Following with an integrated etch can complete the DD image transfer into the underneath dielectric. A single mask DD process eliminates via/trench misalignment issues, can save up to one half of metal mask cost, and 50% of other processing costs. It is expected to also boost yield and improve product reliability.

UR - http://www.scopus.com/inward/record.url?scp=39149145548&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=39149145548&partnerID=8YFLogxK

U2 - 10.1016/j.mee.2007.11.003

DO - 10.1016/j.mee.2007.11.003

M3 - Article

VL - 85

SP - 599

EP - 602

JO - Microelectronic Engineering

JF - Microelectronic Engineering

SN - 0167-9317

IS - 3

ER -