Sub-40nm V-groove MOSFETs

J. Appenzeller, R. Martel, Ph Avouris, J. Knoch, Y. Lu, K. L. Wang, J. Scholvin, J. A. Del Alamo, P. Rice, P. Solomon

Research output: Contribution to conferencePaperpeer-review

1 Citation (Scopus)

Abstract

The V-groove MOSFETs capable of generating high performance transistor characteristics of sub-40 nm was demonstrated. MOSFETs with source and drain separation down to Lg=36 nm exhibiting a definite state of electric characteristics were presented. The output characteristics of 36 nm V-groove MOSFET, the corresponding sub-threshold and transfer characteristics as well as characteristics for V-groove openings were discussed. The intrinsic output resistance was also calculated.

Original languageEnglish
Pages95-96
Number of pages2
Publication statusPublished - 2001
EventDevice Research Conference (DRC) - Notre Dame, IN, United States
Duration: 2001 Jun 252001 Jun 27

Conference

ConferenceDevice Research Conference (DRC)
Country/TerritoryUnited States
CityNotre Dame, IN
Period01-06-2501-06-27

All Science Journal Classification (ASJC) codes

  • Engineering(all)

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