Synthesizable wide range DPWM with all-digital PLL for digitally-controlled switching converter

Chun Hung Yang; Mu Chin-Wei Mu; Chien-Hung Tsai

doi:10.1109/IECON.2011.6119550

Synthesizable wide range DPWM with all-digital PLL for digitally-controlled switching converter

Chun Hung Yang, Mu Chin-Wei Mu, Chien-Hung Tsai

Department of Electrical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

3 Citations (Scopus)

Abstract

This paper proposes a synthesizable digital pulse-width modulator (DPWM) architecture, which combines conventional hybrid DPWM with all-digital phase-locked loop (ADPLL) schemes. The digitally controlled oscillator (DCO) of the ADPLL shares hardware with the delay line in the hybrid DPWM to reduce cost. The ADPLL allows the proposed DPWM to accurately calibrate its operating frequency (i.e., the switching frequency) to counteract the delay lines' process, voltage, and temperature (PVT) effects in a wide frequency range. An FPGA prototype DPWM and its associated digitally controlled buck converter system are implemented to verify the proposed architecture.

Original language	English
Title of host publication	Proceedings
Subtitle of host publication	IECON 2011 - 37th Annual Conference of the IEEE Industrial Electronics Society
Pages	1626-1630
Number of pages	5
DOIs	https://doi.org/10.1109/IECON.2011.6119550
Publication status	Published - 2011 Dec 1
Event	37th Annual Conference of the IEEE Industrial Electronics Society, IECON 2011 - Melbourne, VIC, Australia Duration: 2011 Nov 7 → 2011 Nov 10

Publication series

Name	IECON Proceedings (Industrial Electronics Conference)

Other

Other	37th Annual Conference of the IEEE Industrial Electronics Society, IECON 2011
Country/Territory	Australia
City	Melbourne, VIC
Period	11-11-07 → 11-11-10

All Science Journal Classification (ASJC) codes

Control and Systems Engineering
Electrical and Electronic Engineering

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10.1109/IECON.2011.6119550

Cite this

Yang, C. H., Chin-Wei Mu, M., & Tsai, C.-H. (2011). Synthesizable wide range DPWM with all-digital PLL for digitally-controlled switching converter. In Proceedings: IECON 2011 - 37th Annual Conference of the IEEE Industrial Electronics Society (pp. 1626-1630). Article 6119550 (IECON Proceedings (Industrial Electronics Conference)). https://doi.org/10.1109/IECON.2011.6119550

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title = "Synthesizable wide range DPWM with all-digital PLL for digitally-controlled switching converter",

abstract = "This paper proposes a synthesizable digital pulse-width modulator (DPWM) architecture, which combines conventional hybrid DPWM with all-digital phase-locked loop (ADPLL) schemes. The digitally controlled oscillator (DCO) of the ADPLL shares hardware with the delay line in the hybrid DPWM to reduce cost. The ADPLL allows the proposed DPWM to accurately calibrate its operating frequency (i.e., the switching frequency) to counteract the delay lines' process, voltage, and temperature (PVT) effects in a wide frequency range. An FPGA prototype DPWM and its associated digitally controlled buck converter system are implemented to verify the proposed architecture.",

author = "Yang, {Chun Hung} and {Chin-Wei Mu}, Mu and Chien-Hung Tsai",

year = "2011",

month = dec,

day = "1",

doi = "10.1109/IECON.2011.6119550",

language = "English",

isbn = "9781612849720",

series = "IECON Proceedings (Industrial Electronics Conference)",

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Yang, CH, Chin-Wei Mu, M & Tsai, C-H 2011, Synthesizable wide range DPWM with all-digital PLL for digitally-controlled switching converter. in Proceedings: IECON 2011 - 37th Annual Conference of the IEEE Industrial Electronics Society., 6119550, IECON Proceedings (Industrial Electronics Conference), pp. 1626-1630, 37th Annual Conference of the IEEE Industrial Electronics Society, IECON 2011, Melbourne, VIC, Australia, 11-11-07. https://doi.org/10.1109/IECON.2011.6119550

Synthesizable wide range DPWM with all-digital PLL for digitally-controlled switching converter. / Yang, Chun Hung; Chin-Wei Mu, Mu; Tsai, Chien-Hung.
Proceedings: IECON 2011 - 37th Annual Conference of the IEEE Industrial Electronics Society. 2011. p. 1626-1630 6119550 (IECON Proceedings (Industrial Electronics Conference)).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

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N2 - This paper proposes a synthesizable digital pulse-width modulator (DPWM) architecture, which combines conventional hybrid DPWM with all-digital phase-locked loop (ADPLL) schemes. The digitally controlled oscillator (DCO) of the ADPLL shares hardware with the delay line in the hybrid DPWM to reduce cost. The ADPLL allows the proposed DPWM to accurately calibrate its operating frequency (i.e., the switching frequency) to counteract the delay lines' process, voltage, and temperature (PVT) effects in a wide frequency range. An FPGA prototype DPWM and its associated digitally controlled buck converter system are implemented to verify the proposed architecture.

AB - This paper proposes a synthesizable digital pulse-width modulator (DPWM) architecture, which combines conventional hybrid DPWM with all-digital phase-locked loop (ADPLL) schemes. The digitally controlled oscillator (DCO) of the ADPLL shares hardware with the delay line in the hybrid DPWM to reduce cost. The ADPLL allows the proposed DPWM to accurately calibrate its operating frequency (i.e., the switching frequency) to counteract the delay lines' process, voltage, and temperature (PVT) effects in a wide frequency range. An FPGA prototype DPWM and its associated digitally controlled buck converter system are implemented to verify the proposed architecture.

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Synthesizable wide range DPWM with all-digital PLL for digitally-controlled switching converter

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