Systolic RSA public key cryptosystem

Po Song Chen, Shih Arn Hwang, Cheng Wen Wu

Research output: Contribution to journalConference articlepeer-review

30 Citations (Scopus)

Abstract

A bit-level systolic array for RSA public key cryptosystem is designed based on our modified Montgomery's algorithm. Since the post adjustment in the original algorithm is removed, the modified algorithm leads to both simpler architecture and better performance. A prototype CMOS VLSI chip was designed and simulated, which implements a 512-bit RSA cryptosystem. This chip can achieve an encryption (or decryption) rate of 24.3 Kb/sec under a 50 MHz clock.

Original languageEnglish
Pages (from-to)408-411
Number of pages4
JournalProceedings - IEEE International Symposium on Circuits and Systems
Volume4
Publication statusPublished - 1996 Jan 1
EventProceedings of the 1996 IEEE International Symposium on Circuits and Systems, ISCAS. Part 1 (of 4) - Atlanta, GA, USA
Duration: 1996 May 121996 May 15

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials

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