Abstract
Radio frequency devices based on the state-of-the-art gate-all-around (GAA) nanosheet CFET process suffer from extra parasitic capacitance due to the stacked architecture compared to planar or FinFET devices. In this study, we first calibrate the TCAD process simulation model to experimental data. Subsequently, the model is applied to the simulation of RF characteristics of CFET devices with similar design as our real devices. Subsequently, the influence of various design parameters of the CFET structure are investigated, with emphasis on high frequency characteristics. The optimal design for CFET-based RF device is determined, which resulted in and fT and fMax improvements by 3.74 times and 8.44 times, respectively.
| Original language | English |
|---|---|
| Article number | 108585 |
| Journal | Solid-State Electronics |
| Volume | 201 |
| DOIs | |
| Publication status | Published - 2023 Mar |
All Science Journal Classification (ASJC) codes
- Electronic, Optical and Magnetic Materials
- Condensed Matter Physics
- Materials Chemistry
- Electrical and Electronic Engineering
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