Test Scheduling of BISTed Memory Cores for SOC

  • Cheng-Wen Wu
  • , C.-W. Wang Wang
  • , J.-R. Huang
  • , Y.-F. Lin
  • , K.-L. Cheng
  • , C.-T. Huang
  • , Y.-L. Lin

Research output: Chapter in Book/Report/Conference proceedingConference contribution

20 Citations (Scopus)
Original languageEnglish
Title of host publication11th IEEE Asian Test Symposium
Place of PublicationGuam
Publication statusPublished - 2002 Nov

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