TG-based technique for NBTI degradation and leakage optimization

Chin Hung Lin, Ing-Chao Lin, Kuan Hui Li

Research output: Chapter in Book/Report/Conference proceedingConference contribution

7 Citations (Scopus)

Abstract

NBTI (Negative Bias Temperature Instability), which can degrade the switching speed of PMOS transistors, has become a major reliability challenge. Meanwhile, reducing leakage consumption has become major design goals. In this paper, we propose a novel transmission gate-based (TG) technique to minimize NBTI-induced degradation and leakage. This technique provides higher flexibility compared to the gate replacement technique. Simulation results show our proposed technique has up to 20X and 2.44X on average improvement on NBTI-induced degradation with comparable leakage power reduction. With a 19% area penalty, combining our technique and the gate replacement can reduce 19.39% of the total leakage power and 36.56% of the NBTI-induced circuit degradation.

Original languageEnglish
Title of host publicationIEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2011
Pages133-138
Number of pages6
DOIs
Publication statusPublished - 2011 Sep 19
Event17th IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2011 - Fukuoka, Japan
Duration: 2011 Aug 12011 Aug 3

Publication series

NameProceedings of the International Symposium on Low Power Electronics and Design
ISSN (Print)1533-4678

Other

Other17th IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2011
CountryJapan
CityFukuoka
Period11-08-0111-08-03

All Science Journal Classification (ASJC) codes

  • Engineering(all)

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  • Cite this

    Lin, C. H., Lin, I-C., & Li, K. H. (2011). TG-based technique for NBTI degradation and leakage optimization. In IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2011 (pp. 133-138). [5993625] (Proceedings of the International Symposium on Low Power Electronics and Design). https://doi.org/10.1109/ISLPED.2011.5993625