The direct evidence of substrate potential propagation in a gate-grounded NMOS

Dao Hong Yang, Jone-Fang Chen, Kuo Ming Wu, J. R. Shih, Jian Hsing Lee

Research output: Contribution to journalArticle

1 Citation (Scopus)

Abstract

In this study, the scheme of direct substrate potential measurement is used to explore the real-time substrate potential of the gate-grounded NMOS (GGNMOS). Through the parasitic capacitor between two pins of the packaged device, the coupled voltage can be transmitted to the substrate. It can be found that the substrate potential varies with location and pulse time evolution under transmission-line pulse (TLP) stress. Moreover, the substrate potential can propagate along the channel of the GGNMOS. Based on our experimental results, the substrate potential propagation can affect the turn-on of parasitic n-p-n bipolar in the GGNMOS. To simulate this dynamic behavior, the equivalent RC ladder circuit in the substrate combined with a delta function is proposed and the calculated results match the real-time Si data very well.

Original languageEnglish
Pages (from-to)728-731
Number of pages4
JournalSolid-State Electronics
Volume54
Issue number7
DOIs
Publication statusPublished - 2010 Jul 1

Fingerprint

propagation
Substrates
Delta functions
delta function
Ladders
pulses
ladders
transmission lines
Electric lines
capacitors
Capacitors
Networks (circuits)
Electric potential
electric potential

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics
  • Electrical and Electronic Engineering
  • Materials Chemistry

Cite this

Yang, Dao Hong ; Chen, Jone-Fang ; Wu, Kuo Ming ; Shih, J. R. ; Lee, Jian Hsing. / The direct evidence of substrate potential propagation in a gate-grounded NMOS. In: Solid-State Electronics. 2010 ; Vol. 54, No. 7. pp. 728-731.
@article{165aff9b671e4e048ed2cb21c97fe830,
title = "The direct evidence of substrate potential propagation in a gate-grounded NMOS",
abstract = "In this study, the scheme of direct substrate potential measurement is used to explore the real-time substrate potential of the gate-grounded NMOS (GGNMOS). Through the parasitic capacitor between two pins of the packaged device, the coupled voltage can be transmitted to the substrate. It can be found that the substrate potential varies with location and pulse time evolution under transmission-line pulse (TLP) stress. Moreover, the substrate potential can propagate along the channel of the GGNMOS. Based on our experimental results, the substrate potential propagation can affect the turn-on of parasitic n-p-n bipolar in the GGNMOS. To simulate this dynamic behavior, the equivalent RC ladder circuit in the substrate combined with a delta function is proposed and the calculated results match the real-time Si data very well.",
author = "Yang, {Dao Hong} and Jone-Fang Chen and Wu, {Kuo Ming} and Shih, {J. R.} and Lee, {Jian Hsing}",
year = "2010",
month = "7",
day = "1",
doi = "10.1016/j.sse.2010.03.019",
language = "English",
volume = "54",
pages = "728--731",
journal = "Solid-State Electronics",
issn = "0038-1101",
publisher = "Elsevier Limited",
number = "7",

}

The direct evidence of substrate potential propagation in a gate-grounded NMOS. / Yang, Dao Hong; Chen, Jone-Fang; Wu, Kuo Ming; Shih, J. R.; Lee, Jian Hsing.

In: Solid-State Electronics, Vol. 54, No. 7, 01.07.2010, p. 728-731.

Research output: Contribution to journalArticle

TY - JOUR

T1 - The direct evidence of substrate potential propagation in a gate-grounded NMOS

AU - Yang, Dao Hong

AU - Chen, Jone-Fang

AU - Wu, Kuo Ming

AU - Shih, J. R.

AU - Lee, Jian Hsing

PY - 2010/7/1

Y1 - 2010/7/1

N2 - In this study, the scheme of direct substrate potential measurement is used to explore the real-time substrate potential of the gate-grounded NMOS (GGNMOS). Through the parasitic capacitor between two pins of the packaged device, the coupled voltage can be transmitted to the substrate. It can be found that the substrate potential varies with location and pulse time evolution under transmission-line pulse (TLP) stress. Moreover, the substrate potential can propagate along the channel of the GGNMOS. Based on our experimental results, the substrate potential propagation can affect the turn-on of parasitic n-p-n bipolar in the GGNMOS. To simulate this dynamic behavior, the equivalent RC ladder circuit in the substrate combined with a delta function is proposed and the calculated results match the real-time Si data very well.

AB - In this study, the scheme of direct substrate potential measurement is used to explore the real-time substrate potential of the gate-grounded NMOS (GGNMOS). Through the parasitic capacitor between two pins of the packaged device, the coupled voltage can be transmitted to the substrate. It can be found that the substrate potential varies with location and pulse time evolution under transmission-line pulse (TLP) stress. Moreover, the substrate potential can propagate along the channel of the GGNMOS. Based on our experimental results, the substrate potential propagation can affect the turn-on of parasitic n-p-n bipolar in the GGNMOS. To simulate this dynamic behavior, the equivalent RC ladder circuit in the substrate combined with a delta function is proposed and the calculated results match the real-time Si data very well.

UR - http://www.scopus.com/inward/record.url?scp=77955317374&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=77955317374&partnerID=8YFLogxK

U2 - 10.1016/j.sse.2010.03.019

DO - 10.1016/j.sse.2010.03.019

M3 - Article

VL - 54

SP - 728

EP - 731

JO - Solid-State Electronics

JF - Solid-State Electronics

SN - 0038-1101

IS - 7

ER -