The direct evidence of substrate potential propagation in a gate-grounded NMOS

Dao Hong Yang, Jone-Fang Chen, Kuo Ming Wu, J. R. Shih, Jian Hsing Lee

Research output: Contribution to journalArticle

1 Citation (Scopus)

Abstract

In this study, the scheme of direct substrate potential measurement is used to explore the real-time substrate potential of the gate-grounded NMOS (GGNMOS). Through the parasitic capacitor between two pins of the packaged device, the coupled voltage can be transmitted to the substrate. It can be found that the substrate potential varies with location and pulse time evolution under transmission-line pulse (TLP) stress. Moreover, the substrate potential can propagate along the channel of the GGNMOS. Based on our experimental results, the substrate potential propagation can affect the turn-on of parasitic n-p-n bipolar in the GGNMOS. To simulate this dynamic behavior, the equivalent RC ladder circuit in the substrate combined with a delta function is proposed and the calculated results match the real-time Si data very well.

Original languageEnglish
Pages (from-to)728-731
Number of pages4
JournalSolid-State Electronics
Volume54
Issue number7
DOIs
Publication statusPublished - 2010 Jul 1

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics
  • Electrical and Electronic Engineering
  • Materials Chemistry

Fingerprint Dive into the research topics of 'The direct evidence of substrate potential propagation in a gate-grounded NMOS'. Together they form a unique fingerprint.

Cite this