The study of sensitive circuit and layout for CDM improvement

Jian Hsing Lee, J. R. Shih, Shawn Guo, Dao Hong Yang, Jone F. Chen, David Su, Kenneth Wu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

13 Citations (Scopus)

Abstract

The influence of the internal circuit layout on the chip CDM performance is reported in this paper. It is found that the well pick-up has great impact on the chip CDM performance. The well pick-up can sink the CDM current into the P-Well and induce the non-uniform current to stress the device. This paper also verifies that the bus-line capacitors are more important than the package capacitor for chip CDM since the well pick-up only can affect the current coming from bus line capacitors, but cannot affect the current coming from the package capacitor. Moreover, putting the circuit and ESD protection device in the deep-NWell to isolate the circuit from the P-substrate and using the long contact-to-contact space for ESD protection device also can get the better CDM performance.

Original languageEnglish
Title of host publicationProceedings of the 2009 16th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2009
Pages228-232
Number of pages5
DOIs
Publication statusPublished - 2009 Nov 16
Event2009 16th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2009 - Suzhou, China
Duration: 2009 Jul 62009 Jul 10

Publication series

NameProceedings of the International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA

Other

Other2009 16th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2009
CountryChina
CitySuzhou
Period09-07-0609-07-10

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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  • Cite this

    Lee, J. H., Shih, J. R., Guo, S., Yang, D. H., Chen, J. F., Su, D., & Wu, K. (2009). The study of sensitive circuit and layout for CDM improvement. In Proceedings of the 2009 16th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2009 (pp. 228-232). [5232664] (Proceedings of the International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA). https://doi.org/10.1109/IPFA.2009.5232664