Three dimensional corner delamination analysis for fan-out chip scale package

Yu Ren Chen, G. S. Shen, Hung Chun Yang, Huang Chun Lin, Tz-Cheng Chiu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

Abstract

The problem of a corner delamination in a fan-out chip scale package subjected to therrnomechanical load is investigated. The fracture mechanics parameters, including the stress intensity factors, the strain energy release rate, and phase angles, for a quarter-circular comer delamination between silicon die and fan-out redistribution polyimide layer are obtained by using numerical finite element approach with 3D virtual crack closure technique (VCCT). Results of the analysis indicated that contact between crack faces occurs under temperature cycling condition. The delamination driving forces are modes-II and -III dominant. In addition, the strain energy release rate is highest near the location where the delamination crack front intersects die-to-molding compound interface. Therefore, the delamination is expected to propagate first around the periphery of die surface. Parametric study is also conducted to investigate the effects of material properties and geometrical dimensions on the delamination driving forces. The calculated fracture mechanics parameters may be combined with data on the resistance to interface fracture for predicting reliability of the package.

Original languageEnglish
Title of host publicationProceedings, 2008 International Conference on Electronic Packaging Technology and High Density Packaging, ICEPT-HDP 2008
DOIs
Publication statusPublished - 2008
Event2008 International Conference on Electronic Packaging Technology and High Density Packaging, ICEPT-HDP 2008 - Pudong, Shanghai, China
Duration: 2008 Jul 282008 Jul 31

Other

Other2008 International Conference on Electronic Packaging Technology and High Density Packaging, ICEPT-HDP 2008
CountryChina
CityPudong, Shanghai
Period08-07-2808-07-31

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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