TY - GEN
T1 - Towards optimized packet processing for multithreaded network processor
AU - Chang, Yeim Kuan
AU - Kuo, Fang Chen
PY - 2010
Y1 - 2010
N2 - With the evolution of the Internet, current routers need to support a variety of emerging network applications while the high packet processing rate is still guaranteed. As a result, the network processor has become a promising solution for network devices due to its computation capability and programming flexibility. However, developing the network applications on network processors is not easy. How to efficiently program multiple processing elements and utilize various memory modules as well as the hardware resources on network processors are always challenges. In this paper, we investigate several optimization issues and programming techniques that should be considered by the developers to achieve higher packet processing rate on network processors. We use an existing packet classification scheme called hierarchical binary prefix search (HBPS) [I] as the benchmark to test and evaluate these optimization techniques. The experiments conducted on Intel IXP2400 network processor show that the overall performance of HBPS can be improved about 42% while these techniques are adopted.
AB - With the evolution of the Internet, current routers need to support a variety of emerging network applications while the high packet processing rate is still guaranteed. As a result, the network processor has become a promising solution for network devices due to its computation capability and programming flexibility. However, developing the network applications on network processors is not easy. How to efficiently program multiple processing elements and utilize various memory modules as well as the hardware resources on network processors are always challenges. In this paper, we investigate several optimization issues and programming techniques that should be considered by the developers to achieve higher packet processing rate on network processors. We use an existing packet classification scheme called hierarchical binary prefix search (HBPS) [I] as the benchmark to test and evaluate these optimization techniques. The experiments conducted on Intel IXP2400 network processor show that the overall performance of HBPS can be improved about 42% while these techniques are adopted.
UR - http://www.scopus.com/inward/record.url?scp=78149246058&partnerID=8YFLogxK
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U2 - 10.1109/HPSR.2010.5580281
DO - 10.1109/HPSR.2010.5580281
M3 - Conference contribution
AN - SCOPUS:78149246058
SN - 9781424469710
T3 - 2010 International Conference on High Performance Switching and Routing, HPSR 2010
SP - 127
EP - 132
BT - 2010 International Conference on High Performance Switching and Routing, HPSR 2010
T2 - 2010 International Conference on High Performance Switching and Routing, HPSR 2010
Y2 - 13 June 2010 through 16 June 2010
ER -