Transformation of multiple fault models to a unified model for ATPG efficiency enhancement

Cheng Hung Wu, Kuen Jong Lee

Research output: Chapter in Book/Report/Conference proceedingConference contribution

7 Citations (Scopus)

Abstract

This paper presents a systematic approach to transform various fault models to a unified model such that all faults of interest can be handled in one ATPG run. The fault models that can be transformed include, but are not limited to, stuck-At faults, various types of bridging faults, and cell-internal faults. The unified model is the aggressor-victim type of bridging fault model. Two transformation methods, namely fault-based and pattern-based transformations, are developed for cell-external and cell-internal faults, respectively. With the proposed approach, one can use an ATPG tool for bridging faults to deal with the test generation problems of multiple fault models simultaneously. Hence the total test generation time can be reduced and highly compact test sets can be obtained. Experimental results show that on average 54.94% (16.45%) and 47.22% (17.51%) test pattern volume reductions are achieved compared to the method that deals with the three fault models separately without (with) fault dropping for ISCAS'89 andIWLS'05 circuits, respectively.

Original languageEnglish
Title of host publicationProceedings - 2016 IEEE International Test Conference, ITC 2016
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781467387736
DOIs
Publication statusPublished - 2016 Jul 2
Event47th IEEE International Test Conference, ITC 2016 - Fort Worth, United States
Duration: 2016 Nov 152016 Nov 17

Publication series

NameProceedings - International Test Conference
Volume0
ISSN (Print)1089-3539

Other

Other47th IEEE International Test Conference, ITC 2016
CountryUnited States
CityFort Worth
Period16-11-1516-11-17

Fingerprint

Fault
Enhancement
Model
Transform faults
Test Generation
Cell
Internal
Networks (circuits)
Test Set
Compact Set
Transform
Experimental Results

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering
  • Applied Mathematics

Cite this

Wu, C. H., & Lee, K. J. (2016). Transformation of multiple fault models to a unified model for ATPG efficiency enhancement. In Proceedings - 2016 IEEE International Test Conference, ITC 2016 [7805866] (Proceedings - International Test Conference; Vol. 0). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/TEST.2016.7805866
Wu, Cheng Hung ; Lee, Kuen Jong. / Transformation of multiple fault models to a unified model for ATPG efficiency enhancement. Proceedings - 2016 IEEE International Test Conference, ITC 2016. Institute of Electrical and Electronics Engineers Inc., 2016. (Proceedings - International Test Conference).
@inproceedings{c3ac6e9e425941adad7e9f240ebd1c63,
title = "Transformation of multiple fault models to a unified model for ATPG efficiency enhancement",
abstract = "This paper presents a systematic approach to transform various fault models to a unified model such that all faults of interest can be handled in one ATPG run. The fault models that can be transformed include, but are not limited to, stuck-At faults, various types of bridging faults, and cell-internal faults. The unified model is the aggressor-victim type of bridging fault model. Two transformation methods, namely fault-based and pattern-based transformations, are developed for cell-external and cell-internal faults, respectively. With the proposed approach, one can use an ATPG tool for bridging faults to deal with the test generation problems of multiple fault models simultaneously. Hence the total test generation time can be reduced and highly compact test sets can be obtained. Experimental results show that on average 54.94{\%} (16.45{\%}) and 47.22{\%} (17.51{\%}) test pattern volume reductions are achieved compared to the method that deals with the three fault models separately without (with) fault dropping for ISCAS'89 andIWLS'05 circuits, respectively.",
author = "Wu, {Cheng Hung} and Lee, {Kuen Jong}",
year = "2016",
month = "7",
day = "2",
doi = "10.1109/TEST.2016.7805866",
language = "English",
series = "Proceedings - International Test Conference",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
booktitle = "Proceedings - 2016 IEEE International Test Conference, ITC 2016",
address = "United States",

}

Wu, CH & Lee, KJ 2016, Transformation of multiple fault models to a unified model for ATPG efficiency enhancement. in Proceedings - 2016 IEEE International Test Conference, ITC 2016., 7805866, Proceedings - International Test Conference, vol. 0, Institute of Electrical and Electronics Engineers Inc., 47th IEEE International Test Conference, ITC 2016, Fort Worth, United States, 16-11-15. https://doi.org/10.1109/TEST.2016.7805866

Transformation of multiple fault models to a unified model for ATPG efficiency enhancement. / Wu, Cheng Hung; Lee, Kuen Jong.

Proceedings - 2016 IEEE International Test Conference, ITC 2016. Institute of Electrical and Electronics Engineers Inc., 2016. 7805866 (Proceedings - International Test Conference; Vol. 0).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

TY - GEN

T1 - Transformation of multiple fault models to a unified model for ATPG efficiency enhancement

AU - Wu, Cheng Hung

AU - Lee, Kuen Jong

PY - 2016/7/2

Y1 - 2016/7/2

N2 - This paper presents a systematic approach to transform various fault models to a unified model such that all faults of interest can be handled in one ATPG run. The fault models that can be transformed include, but are not limited to, stuck-At faults, various types of bridging faults, and cell-internal faults. The unified model is the aggressor-victim type of bridging fault model. Two transformation methods, namely fault-based and pattern-based transformations, are developed for cell-external and cell-internal faults, respectively. With the proposed approach, one can use an ATPG tool for bridging faults to deal with the test generation problems of multiple fault models simultaneously. Hence the total test generation time can be reduced and highly compact test sets can be obtained. Experimental results show that on average 54.94% (16.45%) and 47.22% (17.51%) test pattern volume reductions are achieved compared to the method that deals with the three fault models separately without (with) fault dropping for ISCAS'89 andIWLS'05 circuits, respectively.

AB - This paper presents a systematic approach to transform various fault models to a unified model such that all faults of interest can be handled in one ATPG run. The fault models that can be transformed include, but are not limited to, stuck-At faults, various types of bridging faults, and cell-internal faults. The unified model is the aggressor-victim type of bridging fault model. Two transformation methods, namely fault-based and pattern-based transformations, are developed for cell-external and cell-internal faults, respectively. With the proposed approach, one can use an ATPG tool for bridging faults to deal with the test generation problems of multiple fault models simultaneously. Hence the total test generation time can be reduced and highly compact test sets can be obtained. Experimental results show that on average 54.94% (16.45%) and 47.22% (17.51%) test pattern volume reductions are achieved compared to the method that deals with the three fault models separately without (with) fault dropping for ISCAS'89 andIWLS'05 circuits, respectively.

UR - http://www.scopus.com/inward/record.url?scp=85013948442&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=85013948442&partnerID=8YFLogxK

U2 - 10.1109/TEST.2016.7805866

DO - 10.1109/TEST.2016.7805866

M3 - Conference contribution

AN - SCOPUS:85013948442

T3 - Proceedings - International Test Conference

BT - Proceedings - 2016 IEEE International Test Conference, ITC 2016

PB - Institute of Electrical and Electronics Engineers Inc.

ER -

Wu CH, Lee KJ. Transformation of multiple fault models to a unified model for ATPG efficiency enhancement. In Proceedings - 2016 IEEE International Test Conference, ITC 2016. Institute of Electrical and Electronics Engineers Inc. 2016. 7805866. (Proceedings - International Test Conference). https://doi.org/10.1109/TEST.2016.7805866