Tri-Gate Ferroelectric FET Characterization and Modelling for Online Training of Neural Networks at Room Temperature and 233K

Sourav De, Md Aftab Baig, Bo Han Qiu, Darsen Lu, Po Jung Sung, Fu K. Hsueh, Yao Jen Lee, Chun Jung Su

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

This paper reports detailed analysis on switching dynamics and device variability over a wide range of temperatures for deeply scaled (40nm gate length) tri-gate ferroelectric FETs with 10nm HZO fabricated using gate first process on SOI wafers. Our experimental results manifest, 99% ferroelectric switching at room temperature and at 233K. A memory window over 5V and strong gate length dependence of memory window is observed. Highly linear and symmetric multilevel switching characteristics makes our ferroelectric FETs suitable for neuromorphic applications, as demonstrated with neural network online training simulations.

Original languageEnglish
Title of host publication2020 Device Research Conference, DRC 2020
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781728170473
DOIs
Publication statusPublished - 2020 Jun
Event2020 Device Research Conference, DRC 2020 - Columbus, United States
Duration: 2020 Jun 212020 Jun 24

Publication series

NameDevice Research Conference - Conference Digest, DRC
Volume2020-June
ISSN (Print)1548-3770

Conference

Conference2020 Device Research Conference, DRC 2020
Country/TerritoryUnited States
CityColumbus
Period20-06-2120-06-24

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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