Using a single input to support multiple scan chains

Kuen Jong Lee, Jih Jeen Chen, Cheng Hua Huang

Research output: Contribution to journalConference articlepeer-review

167 Citations (Scopus)


Single scan chain architectures suffer from long test application time, while multiple scan chain architectures require large pin overhead and are not supported by Boundary Scan. In this paper, we present a novel method to allow a single input line to support multiple scan chains. By appropriately connecting the inputs of all circuits under test during ATPG process such that the generated test patterns can be broadcast to all scan chains when actual testing is executed, we show that 177 and 280 test patterns are enough to detect all detectable faults in all 10 ISCAS'85 combinational circuits and 10 largest ISCAS'89 sequential circuits, respectively.

Original languageEnglish
Pages (from-to)74-78
Number of pages5
JournalIEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers
Publication statusPublished - 1998 Jan 1
EventProceedings of the 1998 IEEE/ACM International Conference on Computer-Aided Design, ICCAD - San Jose, CA, USA
Duration: 1998 Nov 81998 Nov 12

All Science Journal Classification (ASJC) codes

  • Software
  • Computer Science Applications
  • Computer Graphics and Computer-Aided Design


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