Using condition flag prediction to improve the performance of out-of-order processors

Tzu Hsuan Hsu, Ching Wen Lin, Chung Ho Chen

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

If-conversion is a technique that reduces the misprediction penalties caused by conditional branches. However, executing If-converted code in out-of-order processors creates a naming problem which hinders the rename throughput. Predicting condition flag is an effective approach to resolve this problem. In this paper, we propose a scheme to predict the condition flag based on the ISA of ARM. By restoring two most recent unique condition flag values for each instruction dynamically in run time, and by using a condition flag selector when a condition flag-updating instruction reaches the renaming unit, we can predict the outcome of the condition flag-updating instruction. We show that such an approach is able to achieve the IPC performance increase of 6.62%.

Original languageEnglish
Title of host publication2013 IEEE International Symposium on Circuits and Systems, ISCAS 2013
Pages1240-1243
Number of pages4
DOIs
Publication statusPublished - 2013 Sep 9
Event2013 IEEE International Symposium on Circuits and Systems, ISCAS 2013 - Beijing, China
Duration: 2013 May 192013 May 23

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
ISSN (Print)0271-4310

Other

Other2013 IEEE International Symposium on Circuits and Systems, ISCAS 2013
CountryChina
CityBeijing
Period13-05-1913-05-23

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All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

Cite this

Hsu, T. H., Lin, C. W., & Chen, C. H. (2013). Using condition flag prediction to improve the performance of out-of-order processors. In 2013 IEEE International Symposium on Circuits and Systems, ISCAS 2013 (pp. 1240-1243). [6572077] (Proceedings - IEEE International Symposium on Circuits and Systems). https://doi.org/10.1109/ISCAS.2013.6572077