Abstract
In this work, impact of device variability for silicon nanowire FETs is assessed and SRAM design implication is presented based on 3-D numerical simulation. Both the conventional and junctionless nanowire FETs are shown to be sensitive to structural variation whereas the former is more tolerable. Both the circular wire and non-circular wire cases for feasible SRAM design with a focus on read noise margin are included in our study.
| Original language | English |
|---|---|
| Title of host publication | Technical Proceedings of the 2011 NSTI Nanotechnology Conference and Expo, NSTI-Nanotech 2011 |
| Pages | 46-49 |
| Number of pages | 4 |
| Publication status | Published - 2011 Nov 23 |
| Event | Nanotechnology 2011: Electronics, Devices, Fabrication, MEMS, Fluidics and Computational - 2011 NSTI Nanotechnology Conference and Expo, NSTI-Nanotech 2011 - Boston, MA, United States Duration: 2011 Jun 13 → 2011 Jun 16 |
Publication series
| Name | Technical Proceedings of the 2011 NSTI Nanotechnology Conference and Expo, NSTI-Nanotech 2011 |
|---|---|
| Volume | 2 |
Other
| Other | Nanotechnology 2011: Electronics, Devices, Fabrication, MEMS, Fluidics and Computational - 2011 NSTI Nanotechnology Conference and Expo, NSTI-Nanotech 2011 |
|---|---|
| Country | United States |
| City | Boston, MA |
| Period | 11-06-13 → 11-06-16 |
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All Science Journal Classification (ASJC) codes
- Hardware and Architecture
- Electrical and Electronic Engineering
Cite this
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Variability study of silicon nanowire FETs. / Liao, Yi Bo; Chiang, Meng-Hsueh; Kim, Keunwoo; Hsu, Wei-Chou.
Technical Proceedings of the 2011 NSTI Nanotechnology Conference and Expo, NSTI-Nanotech 2011. 2011. p. 46-49 (Technical Proceedings of the 2011 NSTI Nanotechnology Conference and Expo, NSTI-Nanotech 2011; Vol. 2).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
TY - GEN
T1 - Variability study of silicon nanowire FETs
AU - Liao, Yi Bo
AU - Chiang, Meng-Hsueh
AU - Kim, Keunwoo
AU - Hsu, Wei-Chou
PY - 2011/11/23
Y1 - 2011/11/23
N2 - In this work, impact of device variability for silicon nanowire FETs is assessed and SRAM design implication is presented based on 3-D numerical simulation. Both the conventional and junctionless nanowire FETs are shown to be sensitive to structural variation whereas the former is more tolerable. Both the circular wire and non-circular wire cases for feasible SRAM design with a focus on read noise margin are included in our study.
AB - In this work, impact of device variability for silicon nanowire FETs is assessed and SRAM design implication is presented based on 3-D numerical simulation. Both the conventional and junctionless nanowire FETs are shown to be sensitive to structural variation whereas the former is more tolerable. Both the circular wire and non-circular wire cases for feasible SRAM design with a focus on read noise margin are included in our study.
UR - http://www.scopus.com/inward/record.url?scp=81455140825&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=81455140825&partnerID=8YFLogxK
M3 - Conference contribution
SN - 9781439871393
T3 - Technical Proceedings of the 2011 NSTI Nanotechnology Conference and Expo, NSTI-Nanotech 2011
SP - 46
EP - 49
BT - Technical Proceedings of the 2011 NSTI Nanotechnology Conference and Expo, NSTI-Nanotech 2011
ER -