TY - GEN
T1 - Variability study of silicon nanowire FETs
AU - Liao, Yi Bo
AU - Chiang, Meng-Hsueh
AU - Kim, Keunwoo
AU - Hsu, Wei-Chou
PY - 2011/11/23
Y1 - 2011/11/23
N2 - In this work, impact of device variability for silicon nanowire FETs is assessed and SRAM design implication is presented based on 3-D numerical simulation. Both the conventional and junctionless nanowire FETs are shown to be sensitive to structural variation whereas the former is more tolerable. Both the circular wire and non-circular wire cases for feasible SRAM design with a focus on read noise margin are included in our study.
AB - In this work, impact of device variability for silicon nanowire FETs is assessed and SRAM design implication is presented based on 3-D numerical simulation. Both the conventional and junctionless nanowire FETs are shown to be sensitive to structural variation whereas the former is more tolerable. Both the circular wire and non-circular wire cases for feasible SRAM design with a focus on read noise margin are included in our study.
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M3 - Conference contribution
AN - SCOPUS:81455140825
SN - 9781439871393
T3 - Technical Proceedings of the 2011 NSTI Nanotechnology Conference and Expo, NSTI-Nanotech 2011
SP - 46
EP - 49
BT - Technical Proceedings of the 2011 NSTI Nanotechnology Conference and Expo, NSTI-Nanotech 2011
T2 - Nanotechnology 2011: Electronics, Devices, Fabrication, MEMS, Fluidics and Computational - 2011 NSTI Nanotechnology Conference and Expo, NSTI-Nanotech 2011
Y2 - 13 June 2011 through 16 June 2011
ER -