VLSI implementation of programmable FFT architectures for OFDM communication system

Shuenn-Yuh Lee, Chia Chyang Chen

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Citations (Scopus)

Abstract

Two programmable FFT processors for OFDM (Orthogonal Frequency Division Multiplex) communication systems are presented in this paper. Coolay-Tukey radix-2/4/8 algorithm and mixed-radix-2/22/23 are employed in the pipelined SDF (Single-path Delay Feedback) architecture and pipelined MDC (Multiple-Path Delay Commutator) shared-memory architecture, respectively. The size of FFT processors with power of 2 can be programmable in the range between 64 and 8192. Based on the programmable SDF architecture, an FFT processor with 64/128-point has been implemented under the TSMC 0.35μm CMOS technology. Its core area is 1.6*1.6mm2 and the power consumption is 340mW. Moreover, a simple addressing scheme for pipelined MDC shared-memory architecture with mixed-radix algorithm is also proposed to achieve the programmable object. It can provide a simple control circuit for memory addressing generation, and the mixed-radix butterfly sequence can be automatically generated by way of simple counter. In addition, for the N-point FFT processor, only N/8 coefficients should be stored in the VLSI implementation, therefore, the ROM size and the FFT processor area are reduced. According to the simple control scheme and smaller memory size, the low-power VLSI architecture can be achieved. Furthermore, the architecture with the mixed-radix algorithm also enhances the speed in performing large-point FFT computations compared with the existing shared-memory architectures. Based on this architecture, not only high radix-23 butterfly is adopted to achieve the requirement of high throughput, but also low radix-22 or radix-2 butterfly is utilized to allow all of FFT calculation for N=2 n. An VLSI architecture of 8192-point FFT processor with only power consumption of 890μW is also implemented to demonstrate the proposed method.

Original languageEnglish
Title of host publicationIWCMC 2006 - Proceedings of the 2006 International Wireless Communications and Mobile Computing Conference
Pages893-898
Number of pages6
DOIs
Publication statusPublished - 2006 Dec 1
EventIWCMC 2006 - 2006 International Wireless Communications and Mobile Computing Conference - Vancouver, BC, Canada
Duration: 2006 Jul 32006 Jul 6

Publication series

NameIWCMC 2006 - Proceedings of the 2006 International Wireless Communications and Mobile Computing Conference
Volume2006

Other

OtherIWCMC 2006 - 2006 International Wireless Communications and Mobile Computing Conference
CountryCanada
CityVancouver, BC
Period06-07-0306-07-06

All Science Journal Classification (ASJC) codes

  • Engineering(all)
  • Computer Networks and Communications
  • Computer Science Applications
  • Software

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  • Cite this

    Lee, S-Y., & Chen, C. C. (2006). VLSI implementation of programmable FFT architectures for OFDM communication system. In IWCMC 2006 - Proceedings of the 2006 International Wireless Communications and Mobile Computing Conference (pp. 893-898). (IWCMC 2006 - Proceedings of the 2006 International Wireless Communications and Mobile Computing Conference; Vol. 2006). https://doi.org/10.1145/1143549.1143728