TY - JOUR
T1 - Voltage-Controlled Magnetic Tunnel Junctions for Processing-In-Memory Implementation
AU - Wang, Lezhi
AU - Kang, Wang
AU - Ebrahimi, Farbod
AU - Li, Xiang
AU - Huang, Yangqi
AU - Zhao, Chao
AU - Wang, Kang L.
AU - Zhao, Weisheng
N1 - Publisher Copyright:
© 2018 IEEE.
PY - 2018/3
Y1 - 2018/3
N2 - The processing-in-memory (PIM) paradigm has been considered as a promising alternative to break the bottlenecks of conventional von-Neumann architecture by realizing the unity of data storage and processing in the same die. On the road toward implementing such an architecture, finding a novel memory that can support both dense data storage and efficient logic processing is the critical step. In this letter, we report a voltage-controlled magnetic tunnel junction (MTJ), which is a potential candidate for PIM implementation. Stateful Boolean logic functions can be realized with a single device through the memory-like write/read operations. The device was fabricated and characterized at room temperature. Afterwards, typical Boolean logic operations, e.g., "OR", "AND", and "NXOR", were experimentally demonstrated with the fabricated MTJ device. The proposed approach opens up a new way for PIM implementation in spintronic memories.
AB - The processing-in-memory (PIM) paradigm has been considered as a promising alternative to break the bottlenecks of conventional von-Neumann architecture by realizing the unity of data storage and processing in the same die. On the road toward implementing such an architecture, finding a novel memory that can support both dense data storage and efficient logic processing is the critical step. In this letter, we report a voltage-controlled magnetic tunnel junction (MTJ), which is a potential candidate for PIM implementation. Stateful Boolean logic functions can be realized with a single device through the memory-like write/read operations. The device was fabricated and characterized at room temperature. Afterwards, typical Boolean logic operations, e.g., "OR", "AND", and "NXOR", were experimentally demonstrated with the fabricated MTJ device. The proposed approach opens up a new way for PIM implementation in spintronic memories.
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U2 - 10.1109/LED.2018.2791510
DO - 10.1109/LED.2018.2791510
M3 - Article
AN - SCOPUS:85041216401
SN - 0741-3106
VL - 39
SP - 440
EP - 443
JO - IEEE Electron Device Letters
JF - IEEE Electron Device Letters
IS - 3
ER -