@inproceedings{f05d104eb3a44d3b874b872f2376fdf3,
title = "Write-energy-saving ReRAM-based nonvolatile SRAM with redundant bit-write-aware controller for last-level caches",
abstract = "Nonvolatile static random-access memory (NV-SRAM) is a crucial component type for normally-off computing systems. This work proposes a novel 10T2R resistive random-access memory (ReRAM)-based NV-SRAM controller that is aware of redundant bit writes and considers the conditions of redundant bit writes. When data stored in SRAM cells are the same as the data in ReRAM devices, backup can be skipped. Otherwise, backup is performed. As a result, redundant bit-write conditions indicate that energy can be saved when backing up data. Simulations show that as much as 93% of typical energy requirements can be saved when the high resistive state is larger than 10 MΩ. As long as the probability of redundant bit writes is larger than 25%, backup energy saving can be achieved. The ReRAM chip is manufactured with 90 nm CMOS technology and the ReRAM process of the Industrial Technology Research Institute. This design can be applied to L2 and L3 caches.",
author = "Chien, {Tsai Kan} and Chiou, {Lih Yih} and Tsou, {Yi Sung} and Sheu, {Shyh Shyuan} and Wang, {Pei Hua} and Tsai, {Ming Jinn} and Wu, {Chih I.}",
note = "Publisher Copyright: {\textcopyright} 2017 IEEE.; 22nd IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2017 ; Conference date: 24-07-2017 Through 26-07-2017",
year = "2017",
month = aug,
day = "11",
doi = "10.1109/ISLPED.2017.8009153",
language = "English",
series = "Proceedings of the International Symposium on Low Power Electronics and Design",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
booktitle = "ISLPED 2017 - IEEE/ACM International Symposium on Low Power Electronics and Design",
address = "United States",
}