A Low Power Multi-Channel FSK Transmitter with Injection Locking Technique

  • 何 文浩

Student thesis: Master's Thesis


This thesis proposes a new architecture of transmitter which eliminates the sub-block utilization in traditional transmitter such as PLL and mixer Besides with the application of nonlinear power amplifier the low power design can be achieved This transmitter also has the characteristic of multi-channel communication in fine resolution which is fulfilled with Delta-Sigma Modulator (DSM) and proposes a novel technique fractional injection locking to filter out the quantization frequencies resulting from DSM without the utilization of loop filter With respect to modulation this transmitter is based on Binary frequency shift keying (BFSK) modulation in ISM band (433 Mega Hz) The preceding chapters introduce the concepts such as Delta-Sigma Modulator Injection Locking、and corresponding circuit implementation in proposed transmitter The measurement results are given in chapter four There are two chips in this thesis and they are fractional-N injection locking frequency synthesizer and low power multi-channel FSK transmitter with injection locking technique All the chips are based on TSMC18RF process The preceding one is to validate the proposed technique of quantization frequencies filtering with the aid of FPGA This chip area is 1 158 x 1 158 mm2 The second chip is to validate the proposed transmitter The power consumption of transmitter in simulation is 727? watt with -21 3dBm output power and data rate is 100kbps The chip area is 1 447 x 1 447 mm2
Date of Award2014 Aug 13
Original languageEnglish
SupervisorKuang-Wei Cheng (Supervisor)

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