The main goal of this dissertation is to fabricate Si-based devices through novel doping techniques including hot-wire ion implantation doping (HWID) and inductively coupled plasma (ICP)-assisted HWID (IHWID) and their application for 3D integration First we fabricated a silicon metal–oxide–semiconductor ?eld-effect transistor (MOSFET) by a HWID technique Based on Auger electron spectroscopy the junction depth of the phosphorus was determined as ~80 nm The carrier concentration of the phosphorus was ~5 83×1020 cm?3 as determined from room-temperature Hall measurements The drain current–drain voltage (ID–VD) characteristics of the MOSFET device were measured in the dark by experimental methods The transistor exhibited standard saturation and pinch-off characteristics indicating that the entire channel region under the gate metal could be completely depleted This technique was also found to be applicable to thin-?lm transistors Next we fabricated p-type and n-type MOSFETs using an IHWID technique A complementary metal-oxide-semiconductor (CMOS) device that combines p-MOSFETs and n-MOSFETs was also fabricated The obtained junction depth of the p-MOSFETs was approximately 45 nm The subthreshold slope and on/off current ratio of the p-MOSFET were about 0 18 V/decade and over 104 respectively Measurements of the CMOS device show that it is a good inverter Then we fabricated c-Si solar cells by IHWID The junction depth obtained was approximately 70 nm and the carrier concentration of the phosphorus was approximately 9 34×1020 cm?3 The efficiency of the fabricated SiNx/textured c-Si photovoltaic device was 16 08% IHWID was also utilized to prepare Si n-MOSFETs The subthreshold slope and on/off current ratio of the Si n-MOSFETs from experimental results were about 0 39 V/decade and over 104 respectively Additionally we prepared a ZnO nanowire photodetector using 3D through-silicon via (TSV) technology The diameter and depth of the Si via were approximately 80 μm and 170 μm respectively Cu uniformly filled in each TSV which has an average resistance of about 0 9 mΩ The photocurrent of the 3D ZnO nanowire photodetector increased rapidly with ultraviolet (UV) excitation at a time constant of about ~1 s The on/off current ratio was about 104 Finally we further integrated the ZnO nanowires with MOSFET successfully fabricating a 3D ZnO-nanowire/MOSFET smart photo sensor using through-silicon via (TSV) technology The MOSFET prepared by hot-wire chemical vapor deposition exhibited standard saturation and pinch-off characteristics The dynamic response of the 3D ZnO-nanowire/MOSFET smart photo sensor was stable and reproducible with an on/off current contrast ratio greater than one order of magnitude The decay time as we turned off the UV illumination was less than 1 sec for the 3D ZnO-nanowire/MOSFET smart photo sensor which was significantly shorter than that observed from a conventional ZnO nanowire photo sensor
Date of Award | 2016 Jul 11 |
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Original language | English |
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Supervisor | Shoou-Jinn Chang (Supervisor) |
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A Novel Doping Method of Silicon Devices and Their Application for 3D Integration
奕豪, 陳. (Author). 2016 Jul 11
Student thesis: Doctoral Thesis