A Synthesizer-Free 2 4 GHz Low-IF Receiver Front-End

  • 周 承潣

Student thesis: Master's Thesis

Abstract

This thesis presents an innovative receiver architecture called self-mixing technique that eliminates the power consumption of high-frequency oscillators and frequency synthesizers The operating frequency is 2 4 GHz and the receiver front-end achieves 40 16 dB Conversion Gain 7 1 dB Noise Figure while consuming 2 mW from a 1 2 V supply voltage By mixing the received RF signal with an externally generated intermediate frequency (IF) signal The RF signal is converted to RF plus/minus intermediate frequency (RF±IF) Next through the second mixing mixed with the received RF signal RF±IF is down-convert to the intermediate frequency as the baseband In order to cover the N-channel bands traditional Super-Heterodyne Receiver and Homodyne Receiver needs frequency synthesizers to precisely control the local oscillator (LO) to down-convert the data to the same IF band and the burden is the power consumption and chip size This work is focused on realizing a receiver architecture without a frequency synthesizer for saving the power consumption A prototype is fabricated in 90 nm TSMC technology The chip area is 1 34 × 1 4 mm2
Date of Award2019
Original languageEnglish
SupervisorKuang-Wei Cheng (Supervisor)

Cite this

A Synthesizer-Free 2 4 GHz Low-IF Receiver Front-End
承潣, 周. (Author). 2019

Student thesis: Master's Thesis