Application of Neural Network on the Optimization of Wire Sweep for IC Packaging Process

  • 李 旭昇

Student thesis: Doctoral Thesis


In electronic packaging molding encapsulates a package to protect the integrated circuit chips and wires from environmental or mechanical damages During molding defects like wire sweep may occur Gold wires are common components in integrated circuit IC packages to transfer electronic signals between the die and the lead-frame contacts Number-increased I/Os are built with more wires and smaller wire gaps increasing wire sweep problems Earlier experienced engineers solved these problems through trial and error requiring a large number of molding experiments In this study a process optimization approach with CAE tools neural network and genetic algorithm is proposed for preventing serious wire sweep The approach determines the optimal process parameter settings for transfer molding electronic packages The proposed method eliminates the need to perform a large number of experiments and even improves the experimental parameter settings if those experiments were performed
Date of Award2019
Original languageEnglish
SupervisorSheng-Jye Hwang (Supervisor)

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