Characterization and Analysis of Oxide Interface Charge for FinFETs

  • 賴 如諒

Student thesis: Master's Thesis


With the progress of semiconductor process and device scaling there is serious short channel effect when proceeding the scaling of transistors Increasing the gate controllability by multi gate structure is one of methods to improve the short channel effect FinFETs has been widely applied and used for manufacturing CMOS devices in the semiconductor industrial field However while manufacturing FinFETs on the bulk silicon wafer it is necessary to control the fin height by high intensity plasma etching and deposition of insulating oxide layer The interface oxide charge is thus produced at the interfacial region between silicon and oxide in this process which cause degrading of device performance In this thesis We calibrate successfully the electrical performance of device such as capacitance-voltage (C-V) and current-voltage (I-V) by measurements of devices and three dimensional mathematical simulation software From the C-V curve equivalent oxide thickness (EOT) can be calculated and then the extracted EOT could be substituted into device simulation From the I-V curve the charge density of interface oxide layer can be obtained In order to further investigate the influence of interface oxide charge on devices we consider the impact of different parameters on FinFETs The simulated results show that wide fin width heavy substrate doping shallow junction depth and proper punch through stopper layer depth tend to effectively reduce the leakage current when high interface oxide charge density and thus degraded subthreshold swing (SS) and drain-induced barrier lowering (DIBL) have occurred By using oxygen ion implantation under the channel and further oxidation into oxide layer it is found to be the most effective method to inhibit leakage current
Date of Award2017 Jun 21
Original languageEnglish
SupervisorMeng-Hsueh Chiang (Supervisor)

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