Design of Multi-Sensor Readout Circuit by Using CMOS MEMS Process

Abstract

This dissertation presents the design of low-power low-noise monolithic CMOS MEMS accelerometers using area-efficient digital offset trimming techniques to compensate for process variations caused by sensor capacitance mismatches The consistent distributions of resonant frequency and sensitivity indicates that the wafer-level 0 18-μm CMOS MEMS process is suitable for integrated inertial sensors The simulation and measurement results for the designed and fabricated chips show good linearity and noise performance which are comparable to those seen with commercial products A 0 6-V monolithic CMOS MEMS accelerometer design with automatic offset trimming capability is also demonstrated in this dissertation in order to achieve further reductions in the power consumption of the sensor readout circuits With only 0 2-mW power consumption the readout circuit can detect smaller than 0 01 g acceleration with the digital output provided by a low-voltage 14-bit ΣΔ ADC Finally a multiplexed multi-sensor generic interface circuit which can support the voltage-to-voltage currentto-voltage resistance-to-voltage and capacitance-to-voltage conversion requirements of different sensors is proposed This feature makes multi-sensor SoC possible when integrating an embedded microprocessor and memory in the CMOS MEMS process A test chip which includes a three-axis CMOS MEMS accelerometer the generic interface circuit an incremental ΣΔ ADC and an ARM M0 microprocessor was fabricated When combined with a three-axis magnetic sensor which needs some post processing after finishing all CMOS MEMS processes this test chip can provide a low-power and low-cost three-axis virtual gyroscope with commercial applications

Date of Award	2015 Aug 24
Original language	English
Supervisor	Bin-Da Liu (Supervisor)