Development of a Thermoelectric Energy Generator with Double Cavity by Single Polysilicon Layer in CMOS Process

Abstract

Energy harvesting is a major challenge in developing wireless sensor network (WSN) applications A thermoelectric generator (TEG) can generate electric energy by the temperature difference between a hot and cold junction through the Seebeck effect This thesis proposes a TEG chip with double cavity design by TSMC 0 18 μm 1P6M CMOS process This design has better Seebeck coefficient from the polysilicon layer and better structure design to obtain higher performance Measurement result shows that the TEG chip has voltage factor 15 60 V/cm2K and power factor 0 105 μW/cm2K2 in a 1 5 mm × 1 5 mm unit cell about 5 4 times and 2 34 times of the previous work by using TSMC 0 35 μm 2P4M CMOS process respectively In addition an improved wafer level packaging is proposed for TEG chip for better thermal distribution

Date of Award	2020
Original language	English
Supervisor	Shih-Ming Yang (Supervisor)