Extending RAM-Based TCAM with Range and Update

Abstract

Packet classification is an important mechanism in network infrastructure today and it is commonly used in network applications such as firewall intrusion detectors or Quality of Service (QOS) Ternary Content Addressable Memory (TCAM) is widely used in some hardware-based solutions for packet classification Traditional ASIC-based TCAMs are expensive and unscalable In addition this type of TCAM usually cannot store rules with range fields Although some range encoding methods can solve this problem it will result in low TCAM utilization Compare with ASIC FPGA are reconfigurable and can be deployed fast RAM-based TCAM have been proposed and implemented on FPGA However rules with range fields still cannot be stored directly in the RAM-based TCAM In this thesis we proposed the bound-match method to solve the range-match problem Compare with the RAM-based TCAM we use additional RAMs and circuit logic to perform bound-match Besides we also add the design that is suitable for traditional TCAM update scheme into our system According to the implementation results on Xilinx Virtex-7 XC7V2000T the proposed system can support more than 12000 5-tuple rules Compare with the RAM-based TCAM the clock rate of the system is not decrease too much by adopted the pipelined design We also estimate the clock cycles needed to complete the update process of a newly inserted rule

Date of Award	2019
Original language	English
Supervisor	Yeim-Kuan Chang (Supervisor)