Hardware Implementation of Local Binary Pattern with Variable Parameters for Human Detection

Abstract

With the advancement in technology computer vision is now the achieving goal where computers can imitate human vision and can help identifying and analyzing data automatically In computer vision human detection has been an important research topic which can be widely used in many applications in ensuring human safety such as surveillance systems and automotive systems Therefore high accuracy human detection algorithm can greatly enhance the practicability of these systems Local Binary Pattern (LBP) is a robust feature extraction algorithm It can efficiently describe the text features of the target object As compared to other feature extraction algorithm Local Binary Pattern (LBP) has excellent achievement in the researches of human detection Since human detection technique are performed in embedded devices to make applications practical such as dashboard cameras the hardware approximation technique is used to propose an approximate method to replace the complex computations like trigonometric functions and square roots in this thesis The hardware architecture of the proposed design is implemented to decrease the computation time of the system so that it can reach real-time human detection processing Meanwhile the Soft-IP methodology is also used in designing the hardware Users are able to adjust the parameters to generate different hardware design to meet their needs Our proposed design is an 8-stage pipelined hardware architecture synthesized with SYNOPSYS Design Compiler in the TSMC 0 13μm cell library It is made of 12 3k gate counts and achieves a clock frequency of 500MHz The throughputs are able to process 268M pixels per second The accuracy rate for human detection is regularly higher than 95% on average

Date of Award	2015 Aug 11
Original language	English
Supervisor	Pei-Yin Chen (Supervisor)