Hot-Carrier-Induced Degradation and Gate Oxide Integrity Issue on HV-P-LDMOSFET

Abstract

In the thesis hot-carrier-induced degradation and mechanism as well as the gate oxide integrity issue of P-type high voltage lateral diffused metal-oxide –semiconductor (HVLDMOS) transistors with shallow trench isolation (STI) structure were investigated First the advantages of HVLDMOS transistors and the applications of them were illustrated The motivation of studying the hot-carrier-induced reliability issues of the HVLDMOS transistors with STI structure was presented Moreover the basic theories of the hot carrier effect (HCE) the quasi-breakdown (Q-BD) and direct current current-voltage (DCIV) technique were briefly introduced Next the delineation of the device structure of our study and the measurement setup were presented The measurement methodology of electrical characteristics including ID-VG & IG-VG was introduced In the main part of content the hot-carrier-induced IDlin degradation under IGMAX stress with various stress drain voltage was recorded and analyzed By means of DICV method and TCAD simulation the type of damage and its location were able to be determined Consequently the two-stage degradation mechanism was developed The reduction of residual-fabrication interface traps contributed to the first stage degradation Besides the competition between stress-induced interface traps and electron traps gave birth to the second stage degradation Moreover the gate current correlated well with the IDlin lifetime In the final part under the IGMAX stress the quasi-breakdown (Q-BD) happened in the drain-side gate oxide was inspected The low-resistance paths induced by electron traps resulted in the Q-BD which could cause potential problems of circuit design Moreover the time dependent dielectric breakdown (TDDB) analysis shown that the gate current was capable of an indicator of time to breakdown prediction test

Date of Award	2014 Jul 22
Original language	English
Supervisor	Jone-Fang Chen (Supervisor)