Study of InAs/AlAsSb Epi-Layers and High-k Gate Dielectrics on InAs Substrate

Abstract

III-V semiconductor materials are currently considered for CMOS implementation based on their attractive injection velocities that may help to increase the drive current in future technology nodes InAs (bulk bandgap Eg = 0 35 eV) and GaSb (Eg = 0 73 eV) based channels are contenders at Vd of 0 5 V with both nFET and pFET channels implemented utilizing materials within the same range of lattice constant (6 1 ?) In this dissertation we studied the MOCVD growth for the InAs GaSb/AlAsSb and InAs/AlAsSb on native substrates and the interface of high-k gate dielectrics on InAs and InAs/AlAsSb The investigation of MOCVD growth for (100) and (110) InAs epitaxy on native substrates was done by optimizing V/III ratio and growth temperature The following (100) and (110) InAs MOSCAP fabrication was for the interface study using InAs channel and non-planar device architecture like FinFET consisting of two surface planes including the (100) and (110) planes The physical and electrical characterization of Al2O3 and HfO2 on (100) and (110) n-InAs epi surfaces showed similar interface trap density (Dit) on (100) and (110) surface orientation Therefore GaSb/AlAs0 16Sb0 84/InAs and InAs/AlAs0 16Sb0 84/InAs heterostructures grown by MOCVD were presented The excellent quality of the structures was confirmed by XRD rocking curves with FWHMs below 100 arc seconds for AlAs0 16Sb0 84 clear and crisp Pendell?sung fringes and HRTEM showing defect-free interfaces From a production point of view this demonstration shows the possibility that III-V's could replace the Si channel Experiments for reducing Dit including ex-situ and in-situ pre-treatments before ALD gate metal splits with Ti/Au Pd and Pt post deposition anneal (PDA) splits after ALD splits for ALD deposition temperature and pulse/purge time and introducing interface cap layer (ICL) for changing Dit distribution profile showed the major factor is the ALD process temperature InAs surface oxygen termination and low temperature atomic layer deposition of HfO2 showed improved interface trap density Dit at the high-k/InAs interface by >40× by interface engineering With a Dit of 2 2 × 1011 cm-2 eV-1 within the InAs bandgap device quality has been demonstrated with C-V curves approaching normal and expected behavior and observation of hole inversion

Date of Award	2014 Jul 25
Original language	English
Supervisor	Wei-Chou Hsu (Supervisor)