林 英超

Professor

  • 294 引文
  • 9 h-指數
20052019
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研究成果 2005 2019

篩選
Conference contribution
2018
1 引文 (Scopus)

An efficient NBTI-aware wake-up strategy for power-gated designs

Chiu, K. W., Chen, Y. G. & Lin, I-C., 2018 四月 19, Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018. Institute of Electrical and Electronics Engineers Inc., 卷 2018-January. p. 901-904 4 p.

研究成果: Conference contribution

Aging of materials
Negative bias temperature instability
Temperature
Networks (circuits)
Transistors
2017

Reducing aging on scratchpad memory using temporal- and FSM-based power management

Law, Y. K., Lin, I-C. & Lin, C. C., 2017 六月 5, 2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017. Institute of Electrical and Electronics Engineers Inc., 7939675. (2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017).

研究成果: Conference contribution

Aging of materials
Data storage equipment
Static random access storage
Program processors
Electric power utilization
2015
1 引文 (Scopus)

Analyzing the BTI effect on multi-bit retention registers

Lin, I. C., Wang, Y. T., Yang, S. S. & Wu, Y. L., 2015 一月 1, Intelligent Systems and Applications - Proceedings of the International Computer Symposium, ICS 2014. Chu, W. C-C., Yang, S. J-H. & Chao, H-C. (編輯). IOS Press, p. 269-278 10 p. (Frontiers in Artificial Intelligence and Applications; 卷 274).

研究成果: Conference contribution

Transistors
Temperature
Balloons
Threshold voltage
Degradation
2013
56 引文 (Scopus)

High accuracy approximate multiplier with error correction

Lin, C. H. & Lin, I-C., 2013 一月 1, 2013 IEEE 31st International Conference on Computer Design, ICCD 2013. IEEE Computer Society, p. 33-38 6 p. 6657022. (2013 IEEE 31st International Conference on Computer Design, ICCD 2013).

研究成果: Conference contribution

Error correction
Electric power utilization
12 引文 (Scopus)

High-endurance hybrid cache design in CMP architecture with cache partitioning and access-aware policy

Syu, S. M., Shao, Y. H. & Lin, I. C., 2013 五月 30, GLSVLSI 2013 - Proceedings of the ACM International Conference of the Great Lakes Symposium on VLSI. p. 19-24 6 p. (Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI).

研究成果: Conference contribution

Random access storage
Static random access storage
Durability
Torque
Data storage equipment

Impacts of NBTI and PBTI effects on ternary CAM

Lee, Y. H., Lin, I-C. & Wang, S. W., 2013 七月 5, Proceedings of the 14th International Symposium on Quality Electronic Design, ISQED 2013. p. 38-45 8 p. 6523588. (Proceedings - International Symposium on Quality Electronic Design, ISQED).

研究成果: Conference contribution

Associative storage
Computer aided manufacturing
Memory architecture
Temperature
Routers
2012
1 引文 (Scopus)

Aging-aware reliable multiplier design

Cho, Y. H., Lin, I. C. & Yang, Y. M., 2012 十二月 1, Proceedings - IEEE International SOC Conference, SOCC 2012. p. 322-327 6 p. 6398335. (International System on Chip Conference).

研究成果: Conference contribution

Aging of materials
Logic circuits
Throughput
Degradation

Analyzing BTI effects on retention registers

Wang, Y. T. & Lin, I-C., 2012 十一月 26, Proceedings of the 4th Asia Symposium on Quality Electronic Design, ASQED 2012. p. 71-77 7 p. 6320478. (Proceedings of the 4th Asia Symposium on Quality Electronic Design, ASQED 2012).

研究成果: Conference contribution

Transistors
Threshold voltage
Temperature
Networks (circuits)
2011

Analyzing throughput of power and thermal-constraint multicore processor under NBTI effect

Zheng, S. Q., Lin, I-C. & Lee, Y. H., 2011 六月 3, GLSVLSI'11 - Proceedings of the 2011 Great Lakes Symposium on VLSI. p. 415-418 4 p. (Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI).

研究成果: Conference contribution

Throughput
Transistors
Degradation
Negative bias temperature instability
Hot Temperature
7 引文 (Scopus)

TG-based technique for NBTI degradation and leakage optimization

Lin, C. H., Lin, I-C. & Li, K. H., 2011 九月 19, IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2011. p. 133-138 6 p. 5993625. (Proceedings of the International Symposium on Low Power Electronics and Design).

研究成果: Conference contribution

Degradation
Transistors
Negative bias temperature instability
Networks (circuits)
2010

Transaction-level error susceptibility for bus-based system-on-chip: From single-bit to multi-bit

Zheng, S. Q. & Lin, I-C., 2010 十二月 1, ICS 2010 - International Computer Symposium. p. 670-675 6 p. 5685428. (ICS 2010 - International Computer Symposium).

研究成果: Conference contribution

Bit error rate
System-on-chip
Transistors
Geometry
Communication
2006
8 引文 (Scopus)

Transaction level error susceptibility model for bus based SoC architectures

Lin, I-C., Srinivasan, S., Vijaykrishnan, N. & Dhanwada, N., 2006 十二月 1, Proceedings - 7th International Symposium on Quality Electronic Design, ISQED 2006. p. 775-780 6 p. 1613230. (Proceedings - International Symposium on Quality Electronic Design, ISQED).

研究成果: Conference contribution

System-on-chip
Communication
Experiments
2005
57 引文 (Scopus)

A power estimation methodology for SystemC transaction level models

Dhanwada, N., Lin, I-C. & Narayanan, V., 2005 十一月 11, CODES+ISSS 2005 - International Conference on Hardware/Software Codesign and Systems Synthesis. p. 142-147 6 p. (CODES+ISSS 2005 - International Conference on Hardware/Software Codesign and System Synthesis).

研究成果: Conference contribution

Embedded systems
Electric power utilization
System-on-chip