• 664 引文
  • 13 h-指數
19982019
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研究成果 1998 2019

篩選
Article
2019

Regularity-aware routability-driven macro placement methodology for mixed-size circuits with obstacles

Lin, J-M., Deng, Y. L., Li, S. T., Yu, B. H., Chang, L. Y. & Peng, T. W., 2019 一月 1, 於 : IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 27, 1, p. 57-68 12 p., 8478776.

研究成果: Article

Macros
Networks (circuits)
Simulated annealing
2017
3 引文 (Scopus)
Silicon
Simulated annealing
Integrated circuit design
2016
1 引文 (Scopus)
Switches
VLSI circuits
Product design
Linear programming
Electric power utilization
10 引文 (Scopus)

A Systematic Design Methodology of Asynchronous SAR ADCs

Huang, C. P., Lin, J-M., Shyu, Y. T. & Chang, S-J., 2016 五月 1, 於 : IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 24, 5, p. 1835-1848 14 p., 7332786.

研究成果: Article

Digital to analog conversion
Specifications
Silicon
Networks (circuits)
2015
2 引文 (Scopus)
Switches
Planning
Leakage currents
Electric potential
2014
8 引文 (Scopus)
VLSI circuits
Electric potential
Thermal effects
Voltage drop
2013
37 引文 (Scopus)

Effective and efficient approach for power reduction by using multi-bit flip-flops

Shyu, Y. T., Lin, J. M., Huang, C. P., Lin, C. W., Lin, Y. Z. & Chang, S. J., 2013 一月 1, 於 : IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 21, 4, p. 624-635 12 p., 6178020.

研究成果: Article

Flip flop circuits
Integrated circuits
Clocks
Electric power utilization
Networks (circuits)
2012
22 引文 (Scopus)
Capacitors
Analog circuits
Simulated annealing
Signal processing
Electric power utilization
25 引文 (Scopus)
Electric potential
Simulated annealing
Planning
2011
12 引文 (Scopus)
Convex optimization
MATLAB
Cones
Industry
2005
44 引文 (Scopus)
Costs
2004
40 引文 (Scopus)
Costs
Experiments
2003
34 引文 (Scopus)
Networks (circuits)
2002
8 引文 (Scopus)
Processing
18 引文 (Scopus)

Module placement with boundary constraints using B*-trees

Lin, J. M., Yi, H. E. & Chang, Y. W., 2002 八月 1, 於 : IEE Proceedings: Circuits, Devices and Systems. 149, 4, p. 251-256 6 p.

研究成果: Article

Silicon
Trees (mathematics)
Simulated annealing
Costs

Performance-driven placement for dynamically reconfigurable FPGAs

Wu, G. M., Lin, J-M. & Chang, Y. W., 2002 十月 1, 於 : ACM Transactions on Design Automation of Electronic Systems. 7, 4, p. 628-642 15 p.

研究成果: Article

Field programmable gate arrays (FPGA)
Electric power utilization
Scheduling
2001
6 引文 (Scopus)
Field programmable gate arrays (FPGA)
Electric power utilization
Scheduling
Field programmable gate arrays (FPGA)
Scheduling
Networks (circuits)
27 引文 (Scopus)
Field programmable gate arrays (FPGA)
Scheduling
Networks (circuits)
5 引文 (Scopus)
Field programmable gate arrays (FPGA)
Stochastic models
Polynomials