• 1342 引文
  • 19 h-指數
1990 …2020
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研究成果 1990 2019

篩選
Conference article
2013
2 引文 (Scopus)

A new LFSR reseeding scheme via internal response feedback

Lien, W. C., Lee, K-J., Hsieh, T. Y. & Chakrabarty, K., 2013 一月 1, 於 : Proceedings of the Asian Test Symposium. p. 97-102 6 p., 6690622.

研究成果: Conference article

Seed
Feedback
Built-in self test
Networks (circuits)
Integrated circuits
2005
10 引文 (Scopus)
Data storage equipment
Shift registers
Feedback
Built-in self test
Clocks
25 引文 (Scopus)

An embedded processor based SOC test platform

Lee, K-J., Chu, C. Y. & Hong, Y. T., 2005 十二月 1, 於 : Proceedings - IEEE International Symposium on Circuits and Systems. p. 2983-2986 4 p., 1465254.

研究成果: Conference article

Built-in self test
Controllers
Data storage equipment
Testing
Costs
2004
5 引文 (Scopus)

A low-cost diagnosis methodology for pipelined A/D converters

Huang, C. H., Lee, K-J. & Chang, S-J., 2004 十二月 1, 於 : Proceedings of the Asian Test Symposium. p. 296-301 6 p.

研究成果: Conference article

Costs
Built-in self test
Time division multiplexing
Variable frequency oscillators
Networks (circuits)
2001
31 引文 (Scopus)

A token scan architecture for low power testing

Huang, T. C. & Lee, K-J., 2001 十二月 1, 於 : IEEE International Test Conference (TC). p. 660-669 10 p.

研究成果: Conference article

Clocks
Testing
Networks (circuits)
Energy dissipation
Periodicity
2000
38 引文 (Scopus)

An on chip ADC test structure

Wen, Y. C. & Lee, K. J., 2000 十二月 1, 於 : Proceedings -Design, Automation and Test in Europe, DATE. p. 221-225 5 p., 840042.

研究成果: Conference article

Digital to analog conversion
Built-in self test
Specifications
Testing
60 引文 (Scopus)

Peak-power reduction for multiple-scan circuits during test application

Lee, K-J., Huang, T. C. & Chen, J. J., 2000 十二月 1, 於 : Proceedings of the Asian Test Symposium. p. 453-458 6 p.

研究成果: Conference article

Networks (circuits)
Testing
1999
32 引文 (Scopus)
Networks (circuits)
1998
2 引文 (Scopus)
SPICE
Threshold voltage
Networks (circuits)
155 引文 (Scopus)

Using a single input to support multiple scan chains

Lee, K. J., Chen, J. J. & Huang, C. H., 1998 十二月 1, 於 : IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers. p. 74-78 5 p.

研究成果: Conference article

Sequential circuits
Combinatorial circuits
Networks (circuits)
Testing
1997
6 引文 (Scopus)

Built-in current sensor designs based on the bulk-driven technique

Huang, T. C., Huang, M. C. & Lee, K-J., 1997 十二月 1, 於 : Proceedings of the Asian Test Symposium. p. 384-388 5 p.

研究成果: Conference article

Sensors
Energy dissipation
Mirrors
Degradation
Networks (circuits)
1996
2 引文 (Scopus)
Automatic test pattern generation
Electric potential
Networks (circuits)
Monitoring
Sensors
6 引文 (Scopus)
Networks (circuits)
SPICE
Transistors
Electric potential
1995
Networks (circuits)
Sensors
Formal methods
Digital circuits
2 引文 (Scopus)

New architecture for analog boundary scan

Lee, K-J., Jeng, S. Y. & Lee, T. P., 1995 一月 1, 於 : Proceedings - IEEE International Symposium on Circuits and Systems. 1, p. 409-412 4 p.

研究成果: Conference article

Digital circuits
Analog circuits
Testing
1990
17 引文 (Scopus)
Monitoring
SPICE
Networks (circuits)
8 引文 (Scopus)
Networks (circuits)
Monitoring