• 1342 引文
  • 19 h-指數
1990 …2020
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論文

3D-IC Built-In Diagnosis Architecture for TSVs with Different Placement and Impact Ranges of Crosstalk Faults

作者: 文軒, 許., 2016 二月 16

監督員: Lee, K. (Supervisor)

學生論文: Master's Thesis

A High-Efficiency Hybrid Multicast Routing Approach for Mesh-Based Networks-on-Chip

作者: 俊緯, 吳., 2018 二月 5

監督員: Lee, K. (Supervisor)

學生論文: Master's Thesis

A Low Area Overhead BIST Architecture Based on Response Feedback and Logic Reseeding

作者: 崇閔, 蕭., 2014 八月 11

監督員: Lee, K. (Supervisor)

學生論文: Master's Thesis

A Novel Test Generation Method for Small-Delay Defects with User-defined Fault Model

作者: 朝鈞, 商., 2019

監督員: Lee, K. (Supervisor)

學生論文: Master's Thesis

A Run-Pause-Resume Silicon Debug Technique with Cycle-Granularity for Multiple Clock Domain Systems

作者: 碩聯, 洪., 2017 八月 31

監督員: Lee, K. (Supervisor)

學生論文: Master's Thesis

A Throughput Driven High Level Synthesis Algorithm to Synthesize Circuits with Multiple Sampling Rates

作者: 峻嘉, 許., 2014 一月 27

監督員: Lee, K. (Supervisor)

學生論文: Master's Thesis

Autonomous Testing for 3D-ICs with IEEE Std 1687

作者: 金村, 葉., 2016 十一月 9

監督員: Lee, K. (Supervisor)

學生論文: Master's Thesis

Efficient Pattern Generation and Observation Point Insertion for Transition Fault Diagnosis

作者: 奕達, 王., 2014 八月 8

監督員: Lee, K. (Supervisor)

學生論文: Master's Thesis

Generating Single- and Double-Pattern Tests for Multiple CMOS Fault Models in One ATPG Run

作者: 宜成, 龔., 2019

監督員: Lee, K. (Supervisor)

學生論文: Master's Thesis

On-Chip 3D-IC Test System Design for Pre-bond Post-bond TSV Test and TSV Diagnosis Based on IEEE 1838 Standard

作者: 良哲, 李., 2014 一月 27

監督員: Lee, K. (Supervisor)

學生論文: Master's Thesis

On-Chip Autonomous Test Platform Design for Mobile Electronics and Software Tools for FPGA-based Debugger

作者: 國凱, 留., 2015 八月 25

監督員: Lee, K. (Supervisor)

學生論文: Master's Thesis

Output Bit Selection Methodology for Test Response Compaction

作者: 唯証, 連., 2014 十一月 28

監督員: Lee, K. (Supervisor)

學生論文: Doctoral Thesis

Repairable Cell-Based Chip Design for Simultaneous Yield Enhancement and Fault Diagnosis

作者: 盛霖, 林., 2016 十月 31

監督員: Lee, K. (Supervisor)

學生論文: Master's Thesis

Test and Diagnosis Methodology for Various Fault Models in Logic Circuits

作者: 政鴻, 吳., 2018 七月 31

監督員: Lee, K. (Supervisor)

學生論文: Doctoral Thesis

Test Compression with Single-Input Data Spreader and Multiple Test Sessions

作者: 昶聞, 陳., 2018 一月 5

監督員: Lee, K. (Supervisor)

學生論文: Master's Thesis

一可處理多重取樣率系統之低?率系統合成演算法

作者: 興邦, 郭., 2016 十月 31

監督員: Lee, K. (Supervisor)

學生論文: Master's Thesis