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研究成果 1998 2019

  • 700 引文
  • 12 h-指數
  • 46 Conference contribution
  • 37 Article
  • 3 Conference article
  • 2 Paper
2019

An RRAM with a 2D material embedded double switching layer for neuromorphic computing

Chen, P. A., Ge, R. J., Lee, J. W., Hsu, C. H., Hsu, W-C., Akinwande, D. & Chiang, M-H., 2019 一月 8, 2018 IEEE 13th Nanotechnology Materials and Devices Conference, NMDC 2018. Institute of Electrical and Electronics Engineers Inc., 8605915. (2018 IEEE 13th Nanotechnology Materials and Devices Conference, NMDC 2018).

研究成果: Conference contribution

random access memory
oxygen ions
plastic properties
Plasticity
Ions

Atomristors: Memory Effect in Atomically-thin Sheets and Record RF Switches

Ge, R., Wu, X., Kim, M., Chen, P. A., Shi, J., Choi, J., Li, X., Zhang, Y., Chiang, M-H., Lee, J. C. & Akinwande, D., 2019 一月 16, 2018 IEEE International Electron Devices Meeting, IEDM 2018. Institute of Electrical and Electronics Engineers Inc., p. 22.6.1-22.6.4 8614602. (Technical Digest - International Electron Devices Meeting, IEDM; 卷 2018-December).

研究成果: Conference contribution

switches
Switches
Data storage equipment
Monolayers
Sulfur

Insights to the scaling impact on back-gate biasing for FD SOI MOSFETs

Chang, M. Y., Wang, L. J. & Chiang, M-H., 2019 二月 11, 2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2018. Institute of Electrical and Electronics Engineers Inc., 8640185. (2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2018).

研究成果: Conference contribution

SOI (semiconductors)
field effect transistors
thin bodies
inversions
scaling

Simulation-based study of high-density SRAM voltage scaling enabled by inserted-oxide FinFET technology

Wu, Y. T., Ding, F., Connelly, D., Chiang, M-H., Chen, J-F. & Liu, T. J. K., 2019 四月 1, 於 : IEEE Transactions on Electron Devices. 66, 4, p. 1754-1759 6 p., 8661752.

研究成果: Article

Static random access storage
Oxides
Nanowires
Transistors
Electric potential
1 引文 (Scopus)

Speed Optimization of Vertically Stacked Gate-All-Around MOSFETs with Inner Spacers for Low Power and Ultra-Low Power Applications

Huang, Y. C., Chiang, M-H. & Wang, S-J., 2019 四月 23, Proceedings of the 20th International Symposium on Quality Electronic Design, ISQED 2019. IEEE Computer Society, p. 231-234 4 p. 8697706. (Proceedings - International Symposium on Quality Electronic Design, ISQED; 卷 2019-March).

研究成果: Conference contribution

Controllability
Leakage currents
Masks
Capacitance
Tuning
8 引文 (Scopus)

Thinnest Nonvolatile Memory Based on Monolayer h-BN

Wu, X., Ge, R., Chen, P. A., Chou, H., Zhang, Z., Zhang, Y., Banerjee, S., Chiang, M-H., Lee, J. C. & Akinwande, D., 2019 四月 12, 於 : Advanced Materials. 31, 15, 1806790.

研究成果: Article

Boron nitride
Monolayers
Data storage equipment
Metal ions
Nanoelectronics
2018
1 引文 (Scopus)

An area efficient low-voltage 6-T SRAM cell using stacked silicon nanowires

Huang, Y. C., Chiang, M-H., Wang, S-J. & Gupta, S. K., 2018 六月 27, ICICDT 2018 - International Conference on IC Design and Technology, Proceedings. Institute of Electrical and Electronics Engineers Inc., p. 117-120 4 p. (ICICDT 2018 - International Conference on IC Design and Technology, Proceedings).

研究成果: Conference contribution

Static random access storage
Nanowires
Doping (additives)
Silicon
Electric potential
1 引文 (Scopus)

An FET with a Source Tunneling Barrier Showing Suppressed Short-Channel Effects for Low-Power Applications

Hsieh, Y. F., Chen, S. H., Chen, N. Y., Lee, W. J., Tsai, J. H., Chen, C. N., Chiang, M-H., Lu, D. & Kao, K-H., 2018 三月 1, 於 : IEEE Transactions on Electron Devices. 65, 3, p. 855-859 5 p.

研究成果: Article

Field effect transistors
Threshold voltage

A predictive resistive RAM compact model with synaptic behavior for circuit simulations

Lee, J. W., Hsu, C. H. & Chiang, M-H., 2018 一月 1, TechConnect Briefs 2018 - Informatics, Electronics and Microsystems. Laudon, M., Case, F., Romanowicz, B. & Case, F. (編輯). TechConnect, 卷 4. p. 232-235 4 p.

研究成果: Conference contribution

Circuit simulation
Data storage equipment
Plasticity
RRAM

Body-biasing assisted vmin optimization for 5nm-node multi-Vt FD-SOI 6T-SRAM

Chen, J. Y., Chang, M. Y., Chen, S. H., Lee, J. W. & Chiang, M-H., 2018 五月 9, 2018 19th International Symposium on Quality Electronic Design, ISQED 2018. IEEE Computer Society, p. 151-155 5 p. (Proceedings - International Symposium on Quality Electronic Design, ISQED; 卷 2018-March).

研究成果: Conference contribution

Static random access storage
Electric potential
2 引文 (Scopus)

High-density SRAM voltage scaling enabled by inserted-oxide FinFET technology

Wu, Y. T., Chiang, M-H., Chen, J-F., Ding, F., Connelly, D. & Liu, T. J. K., 2018 三月 7, 2017 IEEE SOI-3D-Subthreshold Microelectronics Unified Conference, S3S 2017. Institute of Electrical and Electronics Engineers Inc., p. 1-3 3 p. (2017 IEEE SOI-3D-Subthreshold Microelectronics Unified Conference, S3S 2017; 卷 2018-March).

研究成果: Conference contribution

Static random access storage
Oxides
Electric potential
Threshold voltage
Ion implantation
2017
1 引文 (Scopus)
lightning
graphene
eigenvectors
Green's functions
transport properties
10 引文 (Scopus)

GAAFET Versus Pragmatic FinFET at the 5nm Si-Based CMOS Technology Node

Huang, Y. C., Chiang, M-H., Wang, S-J. & Fossum, J. G., 2017 五月 1, 於 : IEEE Journal of the Electron Devices Society. 5, 3, p. 164-169 6 p., 7890390.

研究成果: Article

Nanowires
Field effect transistors
Technology
Costs and Cost Analysis
Equipment and Supplies
1 引文 (Scopus)

Gate structure engineering for enhancement-mode AlGaN/GaN MOSHEMT

Liu, H. Y., Lee, C. S., Lin, C. W., Chiang, M. H. & Hsu, W. C., 2017 八月 1, 75th Annual Device Research Conference, DRC 2017. Institute of Electrical and Electronics Engineers Inc., 7999446. (Device Research Conference - Conference Digest, DRC).

研究成果: Conference contribution

High electron mobility transistors
Threshold voltage
Fluorine
Doping (additives)
Gate dielectrics
3 引文 (Scopus)

Integration of Gate Recessing and In Situ Cl- Doped Al2O3 for Enhancement-Mode AlGaN/GaN MOSHEMTs Fabrication

Liu, H. Y., Lin, C. W., Hsu, W. C., Lee, C. S., Chiang, M. H., Sun, W. C., Wei, S. Y. & Yu, S. M., 2017 一月, 於 : IEEE Electron Device Letters. 38, 1, p. 91-94 4 p., 7736038.

研究成果: Article

Threshold voltage
Fabrication
Spray pyrolysis
Gate dielectrics
Electric breakdown
9 引文 (Scopus)

Simulation-Based Study of Hybrid Fin/Planar LDMOS Design for FinFET-Based System-on-Chip Technology

Wu, Y. T., Ding, F., Connelly, D., Zheng, P., Chiang, M. H., Chen, J. F. & Liu, T. J. K., 2017 十月, 於 : IEEE Transactions on Electron Devices. 64, 10, p. 4193-4199 7 p., 8010312.

研究成果: Article

Field effect transistors
Electric breakdown
Computer aided design
Semiconductor materials
Electric potential

Simulation based study of oxygen plasma induced defects on zigzag graphene nanoribbons

Chen, P. A., Lee, J. W., Chiang, M-H. & Hsu, W-C., 2017 一月 1, ECS Transactions. Bhansali, S., Brankovic, S., Buttry, D. A., Chu, D., Imahori, H., Katayama, H., Leonte, O., Mukerjee, S., Mukundan, R., Oren, Y., Romankiw, L., Sharma, N., Simonian, A., Trulove, P. C., Vaughey, J. T., Winter, M., Bartlett, P. N., Di Noto, V., Doeff, M., Druffel, T., Fenton, J. M., Fergus, J., Fukunaka, Y., Itagaki, M., Koehne, J., Kostecki, R., Lynch, R. P., Milosev, I., Narayan, S. R., Subramanian, V., Tatsuma, T., Wu, N., Chen, Z., Haverhals, L. M., Hesketh, P., Hillier, A. C., Inaba, M., Krumdick, G., Leddy, J., Manivannan, M., Maurice, V., Mitra, S., Muldoon, J., Noel, J., Rajeshwar, K., Subramanian, V. R., Suroviec, A. H., Suto, K., Zangari, G., Allongue, P., Birbilis, N., Boltalina, O. V., Calabrese Barton, S., Chaitanya, V., Chidambaram, D., Hite, J. K., Lee, J. J., Mantz, R. A., Mauzeroll, J., Minteer, S. D., Orazem, M. E., Ramasamy, R. P., Riemer, D. P., Roeper, D., Rohwerder, M., Sailor, M. J., Schwartz, D. T., Staser, J. A., Wu, G., Xu, H., Alkire, R., Anderson, T. J., Bayachou, M., Bocarsly, A. B., Choi, J. W., Innocenti, M., Kilgore, S. H., Kim, D. J., Kulesza, P. J., Lu, Y. C., Marcus, P., Mauter, M., Nicholas, J. D., Pylypenko, S., Rhodes, C., Soleymani, L., Tao, M., Xing, Y., Abbott, A. P., Chin, B. A., Cliffel, D. E., Douglas, E. A., Edstrom, K., Hamada, H., McMurray, H. N., Meng, Y. S., Miller, E. L., Navaei, M., Nonnenmann, S. S., O'Dwyer, C., Pharkya, P., Rotkin, S. V., Rupp, J. L. M., Williams, G., Bock, C., Buchheit, R., Cheek, G. T., Deligianni, H., Johnson, C., Park, J. G., Pintauro, P. N., Smith, K. C., Vanysek, P., Wang, H., Whitacre, J. F., Xiao, J., Carter, M. T., Dimitrov, N., Fransaer, J., Guyomard, D., Lucht, B. L., Nagahara, L., Natishan, P. M., Sekhar, P. K., Smith, D. K., Stafford, G. R., Sundaram, K. B., Vasiljevic, N., Virtanen, S., Wang, W., Wood, D. L. & Yang, J. J. (編輯). 10 編輯 Electrochemical Society Inc., p. 463-471 9 p. (ECS Transactions; 卷 80, 編號 10).

研究成果: Conference contribution

Nanoribbons
Graphene
Plasmas
Defects
Oxygen

S-shaped gate-all-around MOSFETs for high density design

Huang, Y. C., Wang, S. J. & Chiang, M. H., 2017 六月 29, Joint International EUROSOl Workshop and International Conference on Ultimate Integration on Silicon-ULIS, EUROSOI-ULIS 2017 - Proceedings. Nassiopoulou, A. G. & Sarafis, P. (編輯). Institute of Electrical and Electronics Engineers Inc., p. 160-163 4 p. 7962566. (Joint International EUROSOl Workshop and International Conference on Ultimate Integration on Silicon-ULIS, EUROSOI-ULIS 2017 - Proceedings).

研究成果: Conference contribution

layouts
field effect transistors
Schematic diagrams
systems-on-a-chip
Networks (circuits)
3 引文 (Scopus)
Threshold voltage
threshold voltage
Film thickness
Transistors
transistors
2016
1 引文 (Scopus)

An area efficient gate-all-around ring MOSFET

Huang, Y. C., Chiang, M. H. & Wang, S. J., 2016 九月 27, 2016 IEEE Silicon Nanoelectronics Workshop, SNW 2016. Institute of Electrical and Electronics Engineers Inc., p. 118-119 2 p. 7578011. (2016 IEEE Silicon Nanoelectronics Workshop, SNW 2016).

研究成果: Conference contribution

Transistors
Networks (circuits)
FinFET
System-on-chip
1 引文 (Scopus)

Performance evaluation of stacked gate-all-around MOSFETs at 7 and 10 nm technology nodes

Wu, M. Y. & Chiang, M-H., 2016 五月 25, Proceedings of the 17th International Symposium on Quality Electronic Design, ISQED 2016. IEEE Computer Society, p. 169-172 4 p. 7479195. (Proceedings - International Symposium on Quality Electronic Design, ISQED; 卷 2016-May).

研究成果: Conference contribution

Aspect ratio
FinFET
6 引文 (Scopus)

Subthreshold Kink Effect Revisited and Optimized for Si Nanowire MOSFETs

Chen, C. Y., Lin, J. T. & Chiang, M-H., 2016 三月 1, 於 : IEEE Transactions on Electron Devices. 63, 3, p. 903-909 7 p., 7383277.

研究成果: Article

Nanowires
Transistors
Computer simulation
Electric potential
Hot Temperature
2015
2 引文 (Scopus)

6-T SRAM performance assessment with stacked silicon nanowire MOSFETs

Huang, Y. C., Chiang, M-H., Hsu, W-C. & Cheng, S. Y., 2015 四月 13, Proceedings of the 16th International Symposium on Quality Electronic Design, ISQED 2015. IEEE Computer Society, p. 610-614 5 p. 7085497. (Proceedings - International Symposium on Quality Electronic Design, ISQED; 卷 2015-April).

研究成果: Conference contribution

Static random access storage
Nanowires
Transistors
Silicon
1 引文 (Scopus)

An Analytical Gate-All-Around MOSFET Model for Circuit Simulation

Lin, K. C., Ding, W. W. & Chiang, M-H., 2015 一月 1, 於 : Advances in Materials Science and Engineering. 2015, 320320.

研究成果: Article

Computer hardware description languages
Circuit simulation
Networks (circuits)
Poisson equation
Simulators
5 引文 (Scopus)

A Predictive Compact Model of Bipolar RRAM Cells for Circuit Simulations

Chiang, M. H., Hsu, K. H., Ding, W. W. & Yang, B. R., 2015 七月 1, 於 : IEEE Transactions on Electron Devices. 62, 7, p. 2176-2183 8 p., 7105894.

研究成果: Article

Circuit simulation
Data storage equipment
Computer hardware description languages
Simulators
Heat transfer

A steep subthreshold swing technique for gate-all-around SOI MOSFETs

Chen, C. Y., Lin, J. T., Chiang, M-H. & Hsu, W-C., 2015 一月 1, Advanced CMOS-Compatible Semiconductor Devices 17. Selberherr, S., Omura, Y., Martino, J. A., Raskin, J. P., Ishii, H., Gamiz, F. & Nguyen, B. Y. (編輯). 5 編輯 Electrochemical Society Inc., p. 87-92 6 p. (ECS Transactions; 卷 66, 編號 5).

研究成果: Conference contribution

Nanowires
Silicon
Computer simulation
Electric potential
Hot Temperature
1 引文 (Scopus)

Comparison of 10 nm GAA vs. FinFET 6-T SRAM performance and yield

Zheng, P., Liao, Y. B., Damrongplasit, N., Chiang, M. H., Hsu, W. C. & Liu, T. J. K., 2015 十二月 4, 2014 Silicon Nanoelectronics Workshop, SNW 2014. Institute of Electrical and Electronics Engineers Inc., 7348585. (2014 Silicon Nanoelectronics Workshop, SNW 2014).

研究成果: Conference contribution

Static random access storage
Electric potential
FinFET
10 引文 (Scopus)

Investigations of AlGaN/GaN MOS-HEMT with Al2O3 deposition by ultrasonic spray pyrolysis method

Chou, B. Y., Hsu, W. C., Liu, H. Y., Lee, C. S., Wu, Y. S., Sun, W. C., Wei, S. Y., Yu, S. M. & Chiang, M. H., 2015 一月 1, 於 : Semiconductor Science and Technology. 30, 1, 015009.

研究成果: Article

Spray pyrolysis
High electron mobility transistors
high electron mobility transistors
metal oxide semiconductors
pyrolysis
2014
10 引文 (Scopus)

Design of gate-all-around silicon mosfets for 6-T Sram area efficiency and yield

Liao, Y. B., Chiang, M-H., Damrongplasit, N., Hsu, W-C. & Liu, T. J. K., 2014 一月 1, 於 : IEEE Transactions on Electron Devices. 61, 7, p. 2371-2377 7 p., 6823112.

研究成果: Article

Silicon
Transistors
Random access storage
Nanowires
Electric potential
5 引文 (Scopus)

Growing Al2O3 by ultrasonic spray pyrolysis for Al2O3/AlGaN/GaN metal-insulator-semiconductor ultraviolet photodetectors

Liu, H. Y., Hsu, W. C., Chou, B. Y., Wang, Y. H., Sun, W. C., Wei, S. Y., Yu, S. M. & Chiang, M. H., 2014 十二月 1, 於 : IEEE Transactions on Electron Devices. 61, 12, p. 4062-4069 8 p., 6965486.

研究成果: Article

Spray pyrolysis
Photodetectors
Ultrasonics
Metals
Semiconductor materials
Silicon
Nanowires
nanowires
field effect transistors
Doping (additives)
20 引文 (Scopus)

Investigation of temperature-dependent characteristics of AlGaN/GaN MOS-HEMT by using hydrogen peroxide oxidation technique

Liu, H. Y., Hsu, W-C., Lee, C. S., Chou, B. Y., Liao, Y. B. & Chiang, M-H., 2014 一月 1, 於 : IEEE Transactions on Electron Devices. 61, 8, p. 2760-2766 7 p., 6828723.

研究成果: Article

High electron mobility transistors
Hydrogen peroxide
Hydrogen Peroxide
Metals
Oxidation
2 引文 (Scopus)

Multi-threshold design methodology of stacked Si-nanowire FETs

Liao, Y. B. & Chiang, M-H., 2014 一月 30, 2014 SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2014. Institute of Electrical and Electronics Engineers Inc., 7028206. (2014 SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2014).

研究成果: Conference contribution

Field effect transistors
Nanowires
Doping (additives)
Silicon
Substrates
4 引文 (Scopus)

Performance optimization for the sub-22 nm fully depleted SOI nanowire transistors

Chen, C. Y., Lin, J. T. & Chiang, M-H., 2014 二月 1, 於 : Solid-State Electronics. 92, p. 57-62 6 p.

研究成果: Article

SOI (semiconductors)
Nanowires
Transistors
nanowires
transistors
8 引文 (Scopus)

Stack gate technique for dopingless bulk FinFETs

Liao, Y. B., Chiang, M. H., Lai, Y. S. & Hsu, W. C., 2014 四月, 於 : IEEE Transactions on Electron Devices. 61, 4, p. 963-968 6 p., 6755551.

研究成果: Article

Doping (additives)
Substrates
Metals
Silicon
Polysilicon
18 引文 (Scopus)

TiO2-dielectric AlGaN/GaN/Si metal-oxide-semiconductor high electron mobility transistors by using nonvacuum ultrasonic spray pyrolysis deposition

Chou, B. Y., Lee, C. S., Yang, C. L., Hsu, W-C., Liu, H. Y., Chiang, M-H., Sun, W. C., Wei, S. Y. & Yu, S. M., 2014 十一月 1, 於 : IEEE Electron Device Letters. 35, 11, p. 1091-1093 3 p.

研究成果: Article

Spray pyrolysis
High electron mobility transistors
Gates (transistor)
Ultrasonics
Metals
3 引文 (Scopus)

Variation-aware comparative study of 10-nm GAA versus FinFET 6-T SRAM performance and yield

Zheng, P., Liao, Y. B., Damrongplasit, N., Chiang, M-H. & Liu, T. J. K., 2014 十二月 1, 於 : IEEE Transactions on Electron Devices. 61, 12, p. 3949-3954 6 p., 6951350.

研究成果: Article

Static random access storage
Transistors
Silicon
Electric potential
FinFET
2013
8 引文 (Scopus)

6-T SRAM cell design with gate-all-around silicon nanowire MOSFETs

Liao, Y. B., Chiang, M. H., Damrongplasit, N., Liu, T. J. K. & Hsu, W. C., 2013 八月 12, 2013 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2013. 6545631. (2013 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2013).

研究成果: Conference contribution

Static random access storage
Nanowires
Silicon
Transistors
Tuning
4 引文 (Scopus)

A compact SPICE model for bipolar resistive switching memory

Hsu, K. H., Ding, W. W. & Chiang, M. H., 2013 十二月 23, 2013 IEEE International Conference of Electron Devices and Solid-State Circuits, EDSSC 2013. 6628127. (2013 IEEE International Conference of Electron Devices and Solid-State Circuits, EDSSC 2013).

研究成果: Conference contribution

SPICE
Computer hardware description languages
Data storage equipment
Simulators
Networks (circuits)

A pragmatic design methodology using proper isolation and doping for bulk FinFETs

Liao, Y. B., Chiang, M-H., Lai, Y. S. & Hsu, W-C., 2013 五月 13, 於 : Solid-State Electronics. 85, p. 48-53 6 p.

研究成果: Article

isolation
Doping (additives)
methodology
Oxides
Substrates
12 引文 (Scopus)

Comparative study of process variations in junctionless and conventional double-gate MOSFETs

Chen, C. Y., Lin, J. T. & Chiang, M-H., 2013, IEEE Nanotechnology Materials and Devices Conference, IEEE NMDC 2013. IEEE Computer Society, p. 81-83 3 p. 6707461

研究成果: Conference contribution

Doping (additives)
Local density approximation
Quantum confinement
Threshold voltage
Probability density function
1 引文 (Scopus)

Microscopic study of random dopant fluctuation in silicon nanowire transistors using 3D simulation

Chen, C. Y., Lin, J. T. & Chiang, M-H., 2013 三月 13, Proceedings of the 2013 IEEE 5th International Nanoelectronics Conference, INEC 2013. p. 267-270 4 p. 6466019. (Proceedings - Winter Simulation Conference).

研究成果: Conference contribution

Silicon Nanowires
Nanowires
Transistors
Doping (additives)
Fluctuations
5 引文 (Scopus)

Performance advantage and energy saving of triangular-shaped FinFETs

Wu, K., Ding, W. W. & Chiang, M-H., 2013 十二月 31, 2013 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2013. p. 143-146 4 p. 6650595. (International Conference on Simulation of Semiconductor Processes and Devices, SISPAD).

研究成果: Conference contribution

Energy Saving
Triangular
Energy conservation
Leakage currents
Capacitance

Performance comparison of non-planar MOSFETs

Liao, Y. B., Chiang, M. H. & Hsu, W. C., 2013 八月 9, Technical Proceedings of the 2013 NSTI Nanotechnology Conference and Expo, NSTI-Nanotech 2013. p. 9-12 4 p. (Technical Proceedings of the 2013 NSTI Nanotechnology Conference and Expo, NSTI-Nanotech 2013; 卷 2).

研究成果: Conference contribution

Static Electricity
Equipment and Supplies
2012
7 引文 (Scopus)

Assessment of structure variation in silicon nanowire FETs and impact on SRAM

Liao, Y. B., Chiang, M-H., Kim, K. & Hsu, W-C., 2012 五月 1, 於 : Microelectronics Journal. 43, 5, p. 300-304 5 p.

研究成果: Article

Static random access storage
Silicon
Field effect transistors
Nanowires
nanowires
High electron mobility transistors
high electron mobility transistors
Carrier concentration
Drain current
Transconductance
4 引文 (Scopus)

Comprehensive study of InGaP/InGaAs/GaAs dual channel pseudomorphic high electron mobility transistors

Chu, K. Y., Cheng, S. Y., Chiang, M-H., Liu, Y. J., Huang, C. C., Chen, T. Y., Hsu, C. S., Liu, W-C., Cheng, W. Y. & Lin, B. C., 2012 六月 1, 於 : Solid-State Electronics. 72, p. 22-28 7 p.

研究成果: Article

High electron mobility transistors
high electron mobility transistors
Microwaves
Digital devices
Microwave devices

Demonstration of a novel multilevel storage scheme for phase change memory using a parameterized HSPICE model

Chao, D. S., Lien, C. H., Liao, Y. B., Chiang, M. H., Yen, P. H., Chen, M. J., Chiang, P. C. & Tsai, M. J., 2012 十二月 1, China Semiconductor Technology International Conference 2012, CSTIC 2012. 1 編輯 p. 1303-1310 8 p. (ECS Transactions; 卷 44, 編號 1).

研究成果: Conference contribution

Phase change memory
Pulse code modulation
Demonstrations

Design issues and insights of multi-fin bulk silicon FinFETs

Li, H. & Chiang, M-H., 2012 七月 16, Proceedings of the 13th International Symposium on Quality Electronic Design, ISQED 2012. p. 723-726 4 p. 6187571. (Proceedings - International Symposium on Quality Electronic Design, ISQED).

研究成果: Conference contribution

Silicon
Substrates
Leakage currents
Aspect ratio
Transistors
2011
3 引文 (Scopus)

A high-density SRAM design technique using silicon nanowire FETs

Liao, Y. B., Chiang, M. H., Kim, K. & Hsu, W. C., 2011 十二月 1, 2011 International Semiconductor Device Research Symposium, ISDRS 2011. 6135407. (2011 International Semiconductor Device Research Symposium, ISDRS 2011).

研究成果: Conference contribution

Static random access storage
Field effect transistors
Nanowires
Wire
Silicon